Execute in place.

Charles Manning manningc2 at actrix.gen.nz
Wed Jun 4 16:48:31 EDT 2003


On Wednesday 04 June 2003 22:06, David Woodhouse wrote:
> On Wed, 2003-06-04 at 10:57, Jörn Engel wrote:
> > For my flash chips, an erase operation is in the ballpark of a second.
> > That is very long for interrupts, so I would assume, we never complete
> > an erase without being interrupted.  Does this mean that a formerly
> > suspended and resumed erase operation completes quicker than a fresh
> > one?
>
> That appears to be the case, yes. Certainly, in the common case of it
> being 10ms before you get the next timer tick and consider rescheduling,
> the chip's made enough progress that it doesn't have to start again from
> scratch.
>
> Someone with more knowledge of flash chip internals could possibly give
> a more coherent and informative answer -- but I was concerned about the
> possibility you raise and that's partly why I was doing the flood-ping
> testing.

That's the whole purpose of erase suspend/resume. Inside the flash there is a 
wee counter thing that drives the erase state machine. When you erase suspend 
it stops; when you resume it continues where it left off. 

Of course if you abort the erase (like you'd do for NAND and those NORs that 
might not have erase suspend), then the state machine starts from scratch. In 
this case you cannot guarantee termination since you might be forever 
restarting the erase and it never gets a chance to complete.

NAND does not bug me since NAND and XIP are mutually exclusive.

-- Charles




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