[PATCH 13/18] wifi: mt76: mt7925: restore FW_DWLD_BYPASS_DMASHDL in MT7927 PM wake path

[Javier Tia]

mt7927_dma_init() sets FW_DWLD_BYPASS_DMASHDL (BIT(9) of GLO_CFG)
during initial probe, but mt792x_dma_enable() - called on every PM
wake cycle - did not restore it. On MT7927, every CLR_OWN causes the
ROM to reinitialize WFDMA which resets GLO_CFG. The PM wake path
already restores ADDR_EXT_EN and clears CSR_LBK_RX_Q_SEL_EN but was
missing FW_DWLD_BYPASS_DMASHDL.

Add FW_DWLD_BYPASS_DMASHDL to the existing is_mt7927() block in
mt792x_dma_enable() so all three MT7927-specific GLO_CFG bits are
consistently restored after PM wake.

Tested-by: Marcin FM <marcin at lgic.pl>
Tested-by: Cristian-Florin Radoi <radoi.chris at gmail.com>
Tested-by: George Salukvadze <giosal90 at gmail.com>
Tested-by: Evgeny Kapusta <3193631 at gmail.com>
Tested-by: Samu Toljamo <samu.toljamo at gmail.com>
Tested-by: Ariel Rosenfeld <ariel.rosenfeld.750 at gmail.com>
Tested-by: Chapuis Dario <chapuisdario4 at gmail.com>
Tested-by: Thibaut François <tibo at humeurlibre.fr>
Tested-by: 张旭涵 <Loong.0x00 at gmail.com>
Signed-off-by: Javier Tia <floss at jetm.me>
---
 drivers/net/wireless/mediatek/mt76/mt792x_dma.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/mediatek/mt76/mt792x_dma.c b/drivers/net/wireless/mediatek/mt76/mt792x_dma.c
index 32364f19007d..95082d64fb69 100644
--- a/drivers/net/wireless/mediatek/mt76/mt792x_dma.c
+++ b/drivers/net/wireless/mediatek/mt76/mt792x_dma.c
@@ -168,7 +168,8 @@ int mt792x_dma_enable(struct mt792x_dev *dev)
 
 	if (is_mt7927(&dev->mt76)) {
 		mt76_set(dev, MT_WFDMA0_GLO_CFG,
-			 MT_WFDMA0_GLO_CFG_ADDR_EXT_EN);
+			 MT_WFDMA0_GLO_CFG_ADDR_EXT_EN |
+			 MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL);
 		mt76_clear(dev, MT_WFDMA0_GLO_CFG,
 			   MT_WFDMA0_GLO_CFG_CSR_LBK_RX_Q_SEL_EN);
 	}

-- 
2.53.0