[PATCH 2/2] arm64: dts: airoha: en7581: add crypto offload support

[Aleksander Jan Bajkowski]

Hi Christian,

On 3/3/26 21:00, Christian Marangi wrote:
> On Tue, Mar 03, 2026 at 08:39:18PM +0100, Aleksander Jan Bajkowski wrote:
>> Add support for the built-in cryptographic accelerator. This accelerator
>> supports 3DES, AES (128/192/256 bit), ARC4, MD5, SHA1, SHA224, and SHA256.
>> It also supports full IPSEC, SRTP and TLS offload.
>>
>> Signed-off-by: Aleksander Jan Bajkowski <olek2 at wp.pl>
>> ---
>>   arch/arm64/boot/dts/airoha/en7581.dtsi | 12 ++++++++++++
>>   1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi
>> index ff6908a76e8e..4931b704235a 100644
>> --- a/arch/arm64/boot/dts/airoha/en7581.dtsi
>> +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi
>> @@ -300,6 +300,18 @@ rng at 1faa1000 {
>>   			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>>   		};
>>   
>> +		crypto at 1e004000 {
>> +			compatible = "airoha,en7581-eip93",
>> +				"inside-secure,safexcel-eip93ies";
>> +			reg = <0x0 0x1fb70000 0x0 0x1000>;
>> +
>> +			clocks = <&scuclk EN7523_CLK_CRYPTO>;
>> +
>> +			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> +			resets = <&scuclk EN7581_CRYPTO_RST>;
> I guess you can drop the extra new line between clocks interrupts and resets.

It makes sense.

>
> Does the driver supports these property tho? For example the clock is just
> enabled or tweaked to a specific frequency? Same question for resets.

As far as I know, the driver doesn't use these properties. They may be used
in the future.

>
>> +		};
>> +
>>   		system-controller at 1fbf0200 {
>>   			compatible = "airoha,en7581-gpio-sysctl", "syscon",
>>   				     "simple-mfd";
>> -- 
>> 2.47.3
>>