[PATCH v2 16/23] arm64: dts: mt8192: Add H264 venc device node
allen-kh.cheng
allen-kh.cheng at mediatek.com
Wed Feb 23 05:36:39 PST 2022
Hi
On Tue, 2022-02-22 at 17:13 -0500, Nícolas F. R. A. Prado wrote:
> On Fri, Feb 18, 2022 at 05:16:26PM +0800, Allen-KH Cheng wrote:
> > Adds H264 venc node for mt8192 SoC.
> >
> > Signed-off-by: Allen-KH Cheng <allen-kh.cheng at mediatek.com>
> > ---
> > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 23
> > +++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > index 40887120fdb3..936aa788664f 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> > @@ -1342,6 +1342,29 @@
> > power-domains = <&spm
> > MT8192_POWER_DOMAIN_VENC>;
> > };
> >
> > + vcodec_enc: vcodec at 0x17020000 {
>
> The node address shouldn't have the '0x' prefix. Please drop it.
>
OK
> > + compatible = "mediatek,mt8192-vcodec-enc";
> > + reg = <0 0x17020000 0 0x2000>;
> > + iommus = <&iommu0 M4U_PORT_L7_VENC_RCPU>,
> > + <&iommu0 M4U_PORT_L7_VENC_REC>,
> > + <&iommu0 M4U_PORT_L7_VENC_BSDMA>,
> > + <&iommu0 M4U_PORT_L7_VENC_SV_COMV>,
> > + <&iommu0 M4U_PORT_L7_VENC_RD_COMV>,
> > + <&iommu0 M4U_PORT_L7_VENC_CUR_LUMA>,
> > + <&iommu0 M4U_PORT_L7_VENC_CUR_CHROMA>,
> > + <&iommu0 M4U_PORT_L7_VENC_REF_LUMA>,
> > + <&iommu0 M4U_PORT_L7_VENC_REF_CHROMA>,
> > + <&iommu0 M4U_PORT_L7_VENC_SUB_R_LUMA>,
> > + <&iommu0 M4U_PORT_L7_VENC_SUB_W_LUMA>;
>
> Please fix indentation:
> iommus = <&iommu0 M4U_PORT_L7_VENC_RCPU>,
> <&iommu0 M4U_PORT_L7_VENC_REC>,
> <&iommu0 M4U_PORT_L7_VENC_BSDMA>,
> <&iommu0 M4U_PORT_L7_VENC_SV_COMV>,
> <&iommu0 M4U_PORT_L7_VENC_RD_COMV>,
> <&iommu0 M4U_PORT_L7_VENC_CUR_LUMA>,
> <&iommu0 M4U_PORT_L7_VENC_CUR_CHROMA>,
> <&iommu0 M4U_PORT_L7_VENC_REF_LUMA>,
> <&iommu0 M4U_PORT_L7_VENC_REF_CHROMA>,
> <&iommu0 M4U_PORT_L7_VENC_SUB_R_LUMA>,
> <&iommu0 M4U_PORT_L7_VENC_SUB_W_LUMA>;
>
I will fix this.
Thanks,
Allen
> > + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
> > 0>;
> > + mediatek,scp = <&scp>;
> > + power-domains = <&spm
> > MT8192_POWER_DOMAIN_VENC>;
> > + clocks = <&vencsys CLK_VENC_SET1_VENC>;
> > + clock-names = "venc-set1";
> > + assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
> > + assigned-clock-parents = <&topckgen
> > CLK_TOP_UNIVPLL_D4>;
> > + };
> > +
> > camsys: clock-controller at 1a000000 {
> > compatible = "mediatek,mt8192-camsys";
> > reg = <0 0x1a000000 0 0x1000>;
> > --
> > 2.18.0
> >
> >
More information about the Linux-mediatek
mailing list