[PATCH v5 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC
Hardeep Sharma
hardeep.sharma at oss.qualcomm.com
Mon Sep 28 23:59:09 PDT 2026
On 9/3/2026 4:27 PM, Konrad Dybcio wrote:
> On 8/27/26 7:51 PM, Hardeep Sharma wrote:
>> Add SoC-level DTSI (qcom-kuno.dtsi) and IDP board DTS
>> (qcom-kuno-idp.dts) for the Qualcomm Kuno SoC.
>>
>> Peripherals included in this initial set:
>> - Single Cortex-A7 CPU with PSCI idle states
>> - RPMh RSC with clock controller, power domains, and BCM voter
>> - GCC (Global Clock Controller)
>> - TLMM pin controller (110 GPIOs)
>> - Interconnect (aggre-noc, cnoc-main)
>> - GENI UART console (QUP SE3)
>> - SMEM, hardware spinlocks (TCSR mutex)
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
>> Reviewed-by: Linus Walleij <linusw at kernel.org>
>> Reviewed-by: Abel Vesa <abel.vesa at oss.qualcomm.com>
>> Signed-off-by: Hardeep Sharma <hardeep.sharma at oss.qualcomm.com>
>> ---
> [...]
>
>> + soc: soc at 0 {
>> + compatible = "simple-bus";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0 0 0xffffffff>;
> that's just "ranges;"
Thanks For Review.
fixed in v6 :
https://lore.kernel.org/all/20260929-kuno-soc-support-v6-1-a16afafbcbc7@oss.qualcomm.com/
Best wishes
Hardeep Sharma
>
> [...]
>
>> + qup0: geniqup at 9c0000 {
>> + compatible = "qcom,geni-se-qup";
>> + reg = <0x009c0000 0x2000>;
>> + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
>> + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
>> + clock-names = "m-ahb", "s-ahb";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges = <0x0 0x0 0x0 0x0 0x1000000>;
> likewise here, you don't need to precisely limit this.
>
> Konrad
Hi Konrad
Here I cannot use ranges;
An empty ranges; only works when the child node uses the same number of
address and size cells as its parent. That can't happen here:
- The binding fixes qup0 at 2/2. qcom,geni-se.yaml requires
#address-cells and #size-cells to be 2.
- soc is 1/1. It uses 1 cell for addresses and sizes, like the other
32-bit Qualcomm SoCs.
Best Wishes
Hardeep Sharma
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