[PATCH v5 15/15] ARM: dts: qcom: Add initial device tree for Kuno SoC
Hardeep Sharma
hardeep.sharma at oss.qualcomm.com
Mon Sep 28 23:50:56 PDT 2026
On 9/1/2026 9:26 PM, Konrad Dybcio wrote:
> On 8/27/26 7:51 PM, Hardeep Sharma wrote:
>> Add SoC-level DTSI (qcom-kuno.dtsi) and IDP board DTS
>> (qcom-kuno-idp.dts) for the Qualcomm Kuno SoC.
>>
>> Peripherals included in this initial set:
>> - Single Cortex-A7 CPU with PSCI idle states
>> - RPMh RSC with clock controller, power domains, and BCM voter
>> - GCC (Global Clock Controller)
>> - TLMM pin controller (110 GPIOs)
>> - Interconnect (aggre-noc, cnoc-main)
>> - GENI UART console (QUP SE3)
>> - SMEM, hardware spinlocks (TCSR mutex)
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
>> Reviewed-by: Linus Walleij <linusw at kernel.org>
>> Reviewed-by: Abel Vesa <abel.vesa at oss.qualcomm.com>
>> Signed-off-by: Hardeep Sharma <hardeep.sharma at oss.qualcomm.com>
>> ---
> [...]
>
>> + pdc: interrupt-controller at b220000 {
>> + compatible = "qcom,kuno-pdc", "qcom,pdc";
>> + reg = <0x0b220000 0x10000>;
>> + qcom,pdc-ranges = <1 148 6>,
>> + <9 156 2>,
>> + <17 164 7>;
> GPT reports you're missing a whole lot of entries here and that will
> lead to the wakeup GPIOs silently failing.
>
> An old local script suggests this map is correct instead, but please
> check yourself:
>
> <1 148 6>,
> <9 156 2>,
> <17 164 7>,
> <26 173 1>,
> <29 176 1>,
> <40 187 1>,
> <46 193 6>,
> <52 266 32>,
> <84 249 1>,
> <85 256 1>,
> <86 315 4>,
> <90 43 1>,
> <91 45 1>,
> <92 154 2>,
> <94 158 6>,
> <100 171 2>,
> <102 174 1>,
> <103 23 7>,
> <110 147 1>,
> <111 31 4>,
> <115 175 1>,
> <116 177 10>,
> <126 188 5>;
>
> Konrad
Thanks Konrad for review.
fixed in v6 :
https://lore.kernel.org/all/20260929-kuno-soc-support-v6-1-a16afafbcbc7@oss.qualcomm.com/
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