[PATCH 1/2] arm64: dts: ti: k3-am62p: Add MCU SRAM node

Sai Sree Kartheek Adivi s-adivi at ti.com
Sun Sep 27 20:22:10 PDT 2026


From: Hari Nagalla <hnagalla at ti.com>

AM62P devices have two banks of 256KB each SRAM in MCU domain. This
memory is typically used by MCU R5 firmware for low latency accesses.

Signed-off-by: Hari Nagalla <hnagalla at ti.com>
Signed-off-by: Judith Mendez <jm at ti.com>
Signed-off-by: Sai Sree Kartheek Adivi <s-adivi at ti.com>
---
 .../arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
index 2394a4fb5a94c..278404cadcd98 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
@@ -6,6 +6,18 @@
  */
 
 &cbass_mcu {
+	mcu_ram: sram at 79100000 {
+		compatible = "mmio-sram";
+		reg = <0x00 0x79100000 0x00 0x80000>;
+		ranges = <0x00 0x00 0x79100000 0x80000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		mcu1-sram at 0 {
+			reg = <0x0 0x80000>;
+		};
+	};
+
 	mcu_pmx0: pinctrl at 4084000 {
 		compatible = "pinctrl-single";
 		reg = <0x00 0x04084000 0x00 0x88>;
-- 
2.54.0




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