[PATCH v2 1/2] arm64: dts: allwinner: a523: add EPHY 25MHz clock fanout pins

[Jernej Škrabec]

Dne nedelja, 27. september 2026 ob 01:21:41 Srednjeevropski poletni čas je Andre Przywara napisal(a):
> The Allwinner A523 SoC family provides two clock fanout pins, which are
> backed by gated clocks fixed to 25 MHz, divided down from the main
> peripheral PLL. Those are meant to clock an Ethernet PHY, and allow to
> save an external crystal oscillator typically employed for that purpose.
> 
> Add the pin descriptions of the two pins for those clocks, one is within
> the RGMII0 pins, the other within the RGMII1 pins, although the clock
> fanout works completely independently from the two MACs.
> 
> Signed-off-by: Andre Przywara <andre.przywara at arm.com>

Reviewed-by: Jernej Skrabec <jernej.skrabec at gmail.com>

Best regards,
Jernej