[PATCH net-next v2 1/2] net: stmmac: add tc mqprio hw queue priority offload
Lorenzo Bianconi
lorenzo.bianconi at oss.qualcomm.com
Thu Sep 24 03:47:01 PDT 2026
Implement the offload of the tc mqprio hw queue priority in the stmmac
driver. When the mqprio qdisc is configured in channel mode, the MTL TX
scheduler is switched to strict priority, and the PSTQX/PSTC priority
bitmask of each TX queue is programmed from the set of frame priorities
mapped to the owning traffic class (qopt->prio_tc_map).
The channel mode offload requires the DCB hw feature and a 1:1 TC to TX
queue mapping, with a single queue per TC. Configurations with AVB queues
are rejected, since forcing strict priority conflicts with the CBS
algorithm.
In the default DCB mode, only the netdev TC map and the FPE preemption
class mapping are offloaded, leaving the MTL scheduler and the per-queue
priorities to the devicetree configuration.
Reviewed-by: Davide Caratti <dcaratti at redhat.com>
Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi at oss.qualcomm.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 6 +
drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 25 +++--
drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c | 129 ++++++++++++++++++++--
4 files changed, 140 insertions(+), 22 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 4fc96b317d79..69b400e9b138 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -299,6 +299,12 @@ struct stmmac_priv {
/* Protect est parameters */
struct mutex est_lock;
struct stmmac_est *est;
+
+ struct {
+ u32 prio[MTL_MAX_TX_QUEUES];
+ u8 algo;
+ } xmit_qdisc;
+
struct dma_features dma_cap;
struct stmmac_counters mmc;
int hw_cap_support;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
index c889204a7aa5..b6b5ef7c8fc4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c
@@ -230,7 +230,7 @@ int dwmac5_fpe_map_preemption_class(struct net_device *ndev,
if (count == 1)
continue;
- if (priv->plat->tx_sched_algorithm == MTL_TX_ALGORITHM_SP) {
+ if (priv->xmit_qdisc.algo == MTL_TX_ALGORITHM_SP) {
NL_SET_ERR_MSG_MOD(extack, ALG_ERR_MSG);
return -EINVAL;
}
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index bf9e7e4cb1c3..0c9083f8846e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -3533,17 +3533,11 @@ static void stmmac_mac_config_rx_queues_prio(struct stmmac_priv *priv)
*/
static void stmmac_mac_config_tx_queues_prio(struct stmmac_priv *priv)
{
- u8 tx_queues_count = priv->plat->tx_queues_to_use;
- u8 queue;
- u32 prio;
-
- for (queue = 0; queue < tx_queues_count; queue++) {
- if (!priv->plat->tx_queues_cfg[queue].use_prio)
- continue;
+ int i;
- prio = priv->plat->tx_queues_cfg[queue].prio;
- stmmac_tx_queue_prio(priv, priv->hw, prio, queue);
- }
+ for (i = 0; i < priv->plat->tx_queues_to_use; i++)
+ stmmac_tx_queue_prio(priv, priv->hw,
+ priv->xmit_qdisc.prio[i], i);
}
/**
@@ -3604,7 +3598,7 @@ static void stmmac_mtl_configuration(struct stmmac_priv *priv)
/* Configure MTL TX algorithms */
if (tx_queues_count > 1)
stmmac_prog_mtl_tx_algorithms(priv, priv->hw,
- priv->plat->tx_sched_algorithm);
+ priv->xmit_qdisc.algo);
/* Configure CBS in AVB TX queues */
if (tx_queues_count > 1)
@@ -7921,6 +7915,15 @@ static int __stmmac_dvr_probe(struct device *device,
priv->wol_irq = res->wol_irq;
priv->sfty_irq = res->sfty_irq;
+ /* Default xmit qdisc configuration */
+ for (i = 0; i < MTL_MAX_TX_QUEUES; i++) {
+ if (!priv->plat->tx_queues_cfg[i].use_prio)
+ continue;
+
+ priv->xmit_qdisc.prio[i] = priv->plat->tx_queues_cfg[i].prio;
+ }
+ priv->xmit_qdisc.algo = priv->plat->tx_sched_algorithm;
+
if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN) {
ret = stmmac_msi_init(priv, res);
if (ret)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
index 42a00446e9b4..54242461a860 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c
@@ -346,6 +346,9 @@ static int tc_setup_cbs(struct stmmac_priv *priv,
if (!priv->dma_cap.av)
return -EOPNOTSUPP;
+ if (qopt->enable && priv->xmit_qdisc.algo == MTL_TX_ALGORITHM_SP)
+ return -EOPNOTSUPP;
+
port_transmit_rate_kbps = qopt->idleslope - qopt->sendslope;
if (qopt->enable) {
@@ -1265,6 +1268,23 @@ static int stmmac_reset_tc_mqprio(struct net_device *ndev,
struct netlink_ext_ack *extack)
{
struct stmmac_priv *priv = netdev_priv(ndev);
+ int i;
+
+ for (i = 0; i < priv->plat->tx_queues_to_use; i++) {
+ u32 prio;
+
+ if (priv->plat->tx_queues_cfg[i].use_prio)
+ prio = priv->plat->tx_queues_cfg[i].prio;
+ else
+ prio = 0;
+
+ stmmac_tx_queue_prio(priv, priv->hw, prio, i);
+ priv->xmit_qdisc.prio[i] = prio;
+ }
+
+ stmmac_prog_mtl_tx_algorithms(priv, priv->hw,
+ priv->plat->tx_sched_algorithm);
+ priv->xmit_qdisc.algo = priv->plat->tx_sched_algorithm;
netdev_reset_tc(ndev);
netif_set_real_num_tx_queues(ndev, priv->plat->tx_queues_to_use);
@@ -1272,6 +1292,73 @@ static int stmmac_reset_tc_mqprio(struct net_device *ndev,
return stmmac_fpe_map_preemption_class(priv, ndev, extack, 0);
}
+static void tc_mqprio_config_queue_prio(struct stmmac_priv *priv,
+ struct tc_mqprio_qopt *qopt)
+{
+ int i;
+
+ for (i = 0; i < priv->plat->tx_queues_to_use; i++) {
+ u32 prio = 0;
+ int j;
+
+ for (j = 0; j < qopt->num_tc; j++) {
+ int p;
+
+ if (qopt->offset[j] != i)
+ continue;
+
+ /* The PSTQX/PSTC priority map is 8 bits wide, so only
+ * priorities 0-7 can be represented in hardware.
+ * Priorities 8-15 are handled in software by the
+ * kernel through the netdev prio_tc_map.
+ */
+ for (p = 0; p < 8; p++) {
+ if (qopt->prio_tc_map[p] == j)
+ prio |= BIT(p);
+ }
+ break;
+ }
+
+ stmmac_tx_queue_prio(priv, priv->hw, prio, i);
+ priv->xmit_qdisc.prio[i] = prio;
+ }
+
+ stmmac_prog_mtl_tx_algorithms(priv, priv->hw, MTL_TX_ALGORITHM_SP);
+}
+
+static int tc_mqprio_validate_chan_mode(struct stmmac_priv *priv,
+ struct tc_mqprio_qopt_offload *mqprio)
+{
+ struct tc_mqprio_qopt *qopt = &mqprio->qopt;
+ int i;
+
+ if (!priv->dma_cap.dcben)
+ return -EOPNOTSUPP;
+
+ /* Forcing strict priority conflicts with the CBS algorithm
+ * of AVB queues, so reject the offload when any queue is
+ * configured as AVB.
+ */
+ for (i = 0; i < priv->plat->tx_queues_to_use; i++) {
+ if (priv->plat->tx_queues_cfg[i].mode_to_use == MTL_QUEUE_AVB)
+ return -EOPNOTSUPP;
+ }
+
+ for (i = 0; i < qopt->num_tc; i++) {
+ /* The offload switches the MTL scheduler to strict
+ * priority, which only supports a 1:1 TC to TX queue
+ * mapping.
+ */
+ if (qopt->count[i] > 1 || qopt->offset[i] != i) {
+ NL_SET_ERR_MSG_MOD(mqprio->extack,
+ "SP requires 1:1 TXQ map");
+ return -EOPNOTSUPP;
+ }
+ }
+
+ return 0;
+}
+
static int tc_setup_dwmac510_mqprio(struct stmmac_priv *priv,
struct tc_mqprio_qopt_offload *mqprio)
{
@@ -1282,23 +1369,22 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_priv *priv,
struct tc_mqprio_qopt *qopt = &mqprio->qopt;
struct net_device *ndev = priv->dev;
u8 ndev_prio_tc_map[TC_BITMASK + 1];
- int i, err, ndev_ntc;
+ int i, err, ndev_ntc, mode;
if (!qopt->num_tc)
return stmmac_reset_tc_mqprio(ndev, extack);
- if (qopt->num_tc > ARRAY_SIZE(tc_to_txq))
+ if (qopt->num_tc > priv->plat->tx_queues_to_use)
return -EINVAL;
- /* save current tc values for reset */
- ndev_ntc = netdev_get_num_tc(ndev);
- for (i = 0; i < ARRAY_SIZE(ndev->tc_to_txq); i++)
- ndev_tc_to_txq[i].combined =
- READ_ONCE(ndev->tc_to_txq[i].combined);
- for (i = 0; i < ARRAY_SIZE(ndev_prio_tc_map); i++)
- ndev_prio_tc_map[i] = READ_ONCE(ndev->prio_tc_map[i]);
-
for (i = 0; i < qopt->num_tc; i++) {
+ if (qopt->offset[i] + qopt->count[i] >
+ priv->plat->tx_queues_to_use) {
+ NL_SET_ERR_MSG_MOD(extack,
+ "Queues exceed hw TX queues");
+ return -EINVAL;
+ }
+
tc_to_txq[i] = (struct netdev_tc_txq) {
.count = qopt->count[i],
.offset = qopt->offset[i],
@@ -1306,6 +1392,24 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_priv *priv,
num_tx_queues += qopt->count[i];
}
+ mode = mqprio->flags & TC_MQPRIO_F_MODE ? mqprio->mode
+ : TC_MQPRIO_MODE_DCB;
+ if (mode == TC_MQPRIO_MODE_CHANNEL) {
+ err = tc_mqprio_validate_chan_mode(priv, mqprio);
+ if (err)
+ return err;
+
+ priv->xmit_qdisc.algo = MTL_TX_ALGORITHM_SP;
+ }
+
+ /* save current tc values for reset */
+ ndev_ntc = netdev_get_num_tc(ndev);
+ for (i = 0; i < ARRAY_SIZE(ndev->tc_to_txq); i++)
+ ndev_tc_to_txq[i].combined =
+ READ_ONCE(ndev->tc_to_txq[i].combined);
+ for (i = 0; i < ARRAY_SIZE(ndev_prio_tc_map); i++)
+ ndev_prio_tc_map[i] = READ_ONCE(ndev->prio_tc_map[i]);
+
err = stmmac_set_ndev_tcs(ndev, qopt->num_tc, tc_to_txq);
if (err)
goto error_reset_tc;
@@ -1320,6 +1424,9 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_priv *priv,
if (err)
goto error_reset_num_tx_queues;
+ if (mode == TC_MQPRIO_MODE_CHANNEL)
+ tc_mqprio_config_queue_prio(priv, qopt);
+
return 0;
error_reset_num_tx_queues:
@@ -1327,6 +1434,8 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_priv *priv,
netdev_warn(ndev, "Failed to restore %u TX queues\n",
ndev_num_tx_queues);
error_reset_tc:
+ if (mode == TC_MQPRIO_MODE_CHANNEL)
+ priv->xmit_qdisc.algo = priv->plat->tx_sched_algorithm;
stmmac_set_ndev_tcs(ndev, ndev_ntc, ndev_tc_to_txq);
for (i = 0; i < ARRAY_SIZE(ndev_prio_tc_map); i++)
netdev_set_prio_tc_map(ndev, i, ndev_prio_tc_map[i]);
--
2.55.0
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