[PATCH 1/2] dt-bindings: spi: nuvoton,ma35d1-spi: Add Nuvoton MA35D1 SPI controller

[Chi-Wen Weng]

Krzysztof Kozlowski 於 2026/9/23 下午 08:35 寫道:
> On 23/09/2026 06:19, Chi-Wen Weng wrote:
>> From: Chi-Wen Weng <cwweng at nuvoton.com>
>>
>> Add a Devicetree binding for the SPI controller found in the
>> Nuvoton MA35D1 SoC.
> 
> I could swear I saw it last days... I did check and indeed. There is
> qspi which is almost the same binding. Why this cannot be in the same
> file? What are the differences justifying duplicating files?
> 
> 
> 
> Best regards,
> Krzysztof

Hi Krzysztof,

Thanks for pointing this out.

The MA35D1 SPI and QSPI controllers are separate hardware IPs. QSPI
additionally supports dual/quad/DTR transfers and a target-mode timeout
function, while the SPI controller does not.

However, these differences do not require different Devicetree
properties. The register resource, clock, reset, interrupt and native
chip-select descriptions are otherwise the same, so I agree that they
should share one binding.

There is currently one driver-related difference: the existing QSPI
driver does not yet support GPIO chip selects, while the new SPI driver
does. I will therefore keep the QSPI cs-gpios restriction in the shared
schema for now using a compatible-specific conditional.

We also plan to add GPIO chip-select support to the QSPI driver in a
follow-up patch. Once that support is added, the QSPI-specific
cs-gpios restriction can be removed and both compatibles can use the
same schema constraints.

I will merge the SPI and QSPI bindings in v2.

Thanks,
Chi-Wen