[PATCH] ARM: dts: alamo: use qca8337 internal PHYs

[Rosen Penev]

The QCA8337 switch has a managed internal MDIO bus for its built-in
PHYs.  Move the PHY nodes from the external mdio at 0 bus into a
subnode of the switch, and mark the connected switch ports with
phy-mode = "internal", so the ports are linked to the correct PHYs.

Assisted-by: LLM
Signed-off-by: Rosen Penev <rosenp at gmail.com>
---
 .../dts/broadcom/bcm958625-meraki-alamo.dtsi  | 100 +++++++++++-------
 1 file changed, 60 insertions(+), 40 deletions(-)

diff --git a/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi b/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
index c54451dde6dd..d0199c07707c 100644
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
@@ -85,26 +85,6 @@ mdio at 0 {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
-			phy_port6: phy at 0 {
-				reg = <0>;
-			};
-
-			phy_port7: phy at 1 {
-				reg = <1>;
-			};
-
-			phy_port8: phy at 2 {
-				reg = <2>;
-			};
-
-			phy_port9: phy at 3 {
-				reg = <3>;
-			};
-
-			phy_port10: phy at 4 {
-				reg = <4>;
-			};
-
 			switch at 10 {
 				compatible = "qca,qca8337";
 				reg = <0x10>;
@@ -128,60 +108,70 @@ fixed-link {
 					port at 1 {
 						reg = <1>;
 						label = "lan8";
+						phy-mode = "internal";
 						phy-handle = <&phy_port6>;
 					};
 
 					port at 2 {
 						reg = <2>;
 						label = "lan9";
+						phy-mode = "internal";
 						phy-handle = <&phy_port7>;
 					};
 
 					port at 3 {
 						reg = <3>;
 						label = "lan10";
+						phy-mode = "internal";
 						phy-handle = <&phy_port8>;
 					};
 
 					port at 4 {
 						reg = <4>;
 						label = "lan11";
+						phy-mode = "internal";
 						phy-handle = <&phy_port9>;
 					};
 
 					port at 5 {
 						reg = <5>;
 						label = "lan12";
+						phy-mode = "internal";
 						phy-handle = <&phy_port10>;
 					};
 				};
-			};
-		};
 
-		mdio-mii at 2000 {
-			reg = <0x2000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
+				mdio {
+					#address-cells = <1>;
+					#size-cells = <0>;
 
-			phy_port1: phy at 0 {
-				reg = <0>;
-			};
+					phy_port6: ethernet-phy at 0 {
+						reg = <0>;
+					};
 
-			phy_port2: phy at 1 {
-				reg = <1>;
-			};
+					phy_port7: ethernet-phy at 1 {
+						reg = <1>;
+					};
 
-			phy_port3: phy at 2 {
-				reg = <2>;
-			};
+					phy_port8: ethernet-phy at 2 {
+						reg = <2>;
+					};
 
-			phy_port4: phy at 3 {
-				reg = <3>;
-			};
+					phy_port9: ethernet-phy at 3 {
+						reg = <3>;
+					};
 
-			phy_port5: phy at 4 {
-				reg = <4>;
+					phy_port10: ethernet-phy at 4 {
+						reg = <4>;
+					};
+				};
 			};
+		};
+
+		mdio-mii at 2000 {
+			reg = <0x2000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 
 			switch at 10 {
 				compatible = "qca,qca8337";
@@ -206,33 +196,63 @@ fixed-link {
 					port at 1 {
 						reg = <1>;
 						label = "lan3";
+						phy-mode = "internal";
 						phy-handle = <&phy_port1>;
 					};
 
 					port at 2 {
 						reg = <2>;
 						label = "lan4";
+						phy-mode = "internal";
 						phy-handle = <&phy_port2>;
 					};
 
 					port at 3 {
 						reg = <3>;
 						label = "lan5";
+						phy-mode = "internal";
 						phy-handle = <&phy_port3>;
 					};
 
 					port at 4 {
 						reg = <4>;
 						label = "lan6";
+						phy-mode = "internal";
 						phy-handle = <&phy_port4>;
 					};
 
 					port at 5 {
 						reg = <5>;
 						label = "lan7";
+						phy-mode = "internal";
 						phy-handle = <&phy_port5>;
 					};
 				};
+
+				mdio {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					phy_port1: ethernet-phy at 0 {
+						reg = <0>;
+					};
+
+					phy_port2: ethernet-phy at 1 {
+						reg = <1>;
+					};
+
+					phy_port3: ethernet-phy at 2 {
+						reg = <2>;
+					};
+
+					phy_port4: ethernet-phy at 3 {
+						reg = <3>;
+					};
+
+					phy_port5: ethernet-phy at 4 {
+						reg = <4>;
+					};
+				};
 			};
 		};
 	};
-- 
2.55.0