[PATCH v10 02/13] iommu/arm-smmu-v3: Make the ASID space per SMMU instance

[Jason Gunthorpe]

On Sun, 30 Aug 2026 16:18:03 -0700, Nicolin Chen <nicolinc at nvidia.com> wrote:
> An ASID tags the TLB entries within one SMMU, so two instances can use the
> same ASID without ever aliasing each other. Yet the driver allocates them
> out of a single global xarray, which makes the instances share a space that
> the hardware keeps apart, and lets one instance exhaust the IDs of another.
> 
> That global space is a leftover from the BTM support that shared ASIDs with
> the CPU. Now ARM_SMMU_FEAT_BTM is never set, nothing looks a domain up by
> its ASID, and a domain is pinned to one SMMU at the attach.
> 
> [...]

Reviewed-by: Jason Gunthorpe <jgg at nvidia.com>

-- 
Jason