[PATCH 3/3] net: stmmac: fix 10/100 support and MDIO for DW25GMAC

Zhangfei Gao zhangfei.gao at oss.qualcomm.com
Wed Sep 23 01:49:21 PDT 2026


DW25GMAC currently advertises link modes starting at 1Gbps and does not
provide the MAC speed encodings for 10Mbps and 100Mbps. This leaves the
MAC speed field incorrectly configured when a USXGMII PHY negotiates a
legacy speed.

The MDIO setup also selects the XGMAC clock divider table and MDIO
accessors only for DWMAC_CORE_XGMAC. DW25GMAC uses the same MDIO
interface, so falling back to the generic path can cause PHY register
accesses to time out and prevent the PHY from probing.

Add the missing 10/100 capabilities and speed encodings, and handle
DWMAC_CORE_25GMAC through the XGMAC MDIO paths.

Fixes: 4975cb3b1b66 ("net: stmmac: Add DW25GMAC support in stmmac core driver")
Signed-off-by: Zhangfei Gao <zhangfei.gao at oss.qualcomm.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 6 ++++--
 drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c   | 9 ++++++---
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
index 0b00d880fd305..65221b4becf51 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
@@ -1563,9 +1563,11 @@ int dw25gmac_setup(struct stmmac_priv *priv)
 	dwxgmac2_common_setup(priv, "DW25GMAC");
 
 	mac->link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
-			 MAC_1000FD | MAC_2500FD | MAC_5000FD |
-			 MAC_10000FD | MAC_25000FD;
+				 MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD | MAC_5000FD |
+				 MAC_10000FD | MAC_25000FD;
 	mac->link.duplex = 0;
+	mac->link.speed10 = XGMAC_CONFIG_SS_10_MII;
+	mac->link.speed100 = XGMAC_CONFIG_SS_100_MII;
 	mac->link.speed1000 = XGMAC_CONFIG_SS_1000_GMII;
 	mac->link.speed2500 = XGMAC_CONFIG_SS_2500_GMII;
 	mac->link.xgmii.speed2500 = XGMAC_CONFIG_SS_2500;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index afe98ff5bdcb0..f20a6e056781f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -552,7 +552,8 @@ static u32 stmmac_clk_csr_set(struct stmmac_priv *priv)
 	rates = stmmac_std_csr_to_mdc;
 	if (priv->plat->flags & STMMAC_FLAG_HAS_SUN8I)
 		rates = stmmac_sun8i_csr_to_mdc;
-	if (priv->plat->core_type == DWMAC_CORE_XGMAC)
+	if (priv->plat->core_type == DWMAC_CORE_XGMAC ||
+	    priv->plat->core_type == DWMAC_CORE_25GMAC)
 		rates = stmmac_xgmac_csr_to_mdc;
 
 	for (i = 0; rates[i].rate; i++)
@@ -619,7 +620,8 @@ int stmmac_mdio_register(struct net_device *ndev)
 
 	new_bus->name = "stmmac";
 
-	if (priv->plat->core_type == DWMAC_CORE_XGMAC) {
+	if (priv->plat->core_type == DWMAC_CORE_XGMAC ||
+	    priv->plat->core_type == DWMAC_CORE_25GMAC) {
 		new_bus->read = &stmmac_xgmac2_mdio_read_c22;
 		new_bus->write = &stmmac_xgmac2_mdio_write_c22;
 		new_bus->read_c45 = &stmmac_xgmac2_mdio_read_c45;
@@ -663,7 +665,8 @@ int stmmac_mdio_register(struct net_device *ndev)
 	}
 
 	/* Looks like we need a dummy read for XGMAC only and C45 PHYs */
-	if (priv->plat->core_type == DWMAC_CORE_XGMAC)
+	if (priv->plat->core_type == DWMAC_CORE_XGMAC ||
+	    priv->plat->core_type == DWMAC_CORE_25GMAC)
 		stmmac_xgmac2_mdio_read_c45(new_bus, 0, 0, 0);
 
 	/* If fixed-link is set, skip PHY scanning */
-- 
2.43.0




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