[PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support
Ryan Chen
ryan_chen at aspeedtech.com
Mon Sep 21 19:53:27 PDT 2026
Hello Boris,
Stefan has resigned from the EDAC entry:
https://lkml.org/lkml/2026/9/20/1295
That leaves his patch and 9/9 of this series touching the same lines,
and the entry ending up with a reviewer and no maintainer.
You suggested a reviewer entry first, and I understood the reasoning.
But with Stefan gone the choice is now between orphaning the driver and
someone taking it, so I'd rather ask again: I'm happy to take the M:
line. I work on these SoCs at ASPEED and have the hardware and the
documentation for all four variants.
If you'd still rather not, that's fine - tell me and I'll respin 9/9 so
the entry reflects reality instead.
Ryan
> Subject: [PATCH v3 0/9] Add Aspeed AST2700 SDRAM EDAC support
>
> Add ECC error reporting for the Aspeed AST2700 SoC to the existing
> aspeed_edac driver.
>
> The AST2700 memory controller keeps the same overall EDAC programming
> model as the earlier Aspeed BMC SoCs, but uses a different register layout, a
> split interrupt status/clear/mask scheme and DDR4/DDR5 memory.
> Rather than fork the driver, the existing code is first tidied and generalised,
> then the AST2700 is added as one more per-SoC variant.
>
> Patches 2-5 are bug fixes and cleanups to the existing driver. Patches 6 and 7
> rework the implementation to accommodate the AST2700. Patch 8 adds the
> AST2700 support itself, and patch 9 adds a reviewer entry for the driver.
>
> Signed-off-by: Ryan Chen <ryan_chen at aspeedtech.com>
> ---
> Changes in v3:
> - Establish the AST2700 interrupt mask in the driver rather than
> deriving it from the register's contents: ast2700_set_irq() now
> writes the mask outright, masking every source and unmasking only
> the ECC ones, and the mask is established before the interrupt is
> requested.
> - New patch: add myself as a reviewer for the driver in MAINTAINERS.
> - Tested on an AST2600 with CONFIG_PROVE_LOCKING=y; injected correctable
> errors are reported from the interrupt handler with no lockdep reports.
> - Link to v2:
> https://lore.kernel.org/r/20260824-edac-v2-0-c8d8bb693586@aspeedtech.co
> m
>
> Changes in v2:
> - New patch: free the ECC interrupt before the mem_ctl_info in
> aspeed_remove(). The interrupt is requested with devm_request_irq() and
> is only released after .remove() has returned, so edac_mc_free() could
> free the handler's context while the handler was still running on
> another CPU.
> - Acquire the register lock with the irqsave variant in init_csrows() and
> in aspeed_probe(). The interrupt handler takes the same lock in hardirq
> context.
> - Move the dev_dbg() of the interrupt status register out of the
> raw_spinlock critical section in the interrupt handler.
> - Opt aspeed_edac.o into context analysis in drivers/edac/Makefile. The
> check is opt-in per object, so without it the __guarded_by() annotation
> added by the same patch was never actually verified.
> - Return IRQ_NONE from ast2700_dramc_isr() when no ECC interrupt status
> bit is set; the handler clears only the ECC bits, so unconditionally
> claiming the interrupt could livelock the level-triggered line.
> - Tested v2 on both AST2600 and AST2700 by injecting a correctable
> error with the memory controller's ECC error injection; each is
> reported as a CE with the expected failure address.
> - Link to v1:
> https://lore.kernel.org/r/20260812-edac-v1-0-03992edea297@aspeedtech.co
> m
>
> ---
> Ryan Chen (9):
> dt-bindings: edac: aspeed: Add AST2700 SDRAM EDAC
> EDAC/aspeed: Set the DIMM grain
> EDAC/aspeed: Free the interrupt before the mem_ctl_info on remove
> EDAC/aspeed: Clean up whitespace and include ordering
> EDAC/aspeed: Free the mem_ctl_info unconditionally on remove
> EDAC/aspeed: Replace regmap with direct register access
> EDAC/aspeed: Abstract SoC differences behind chip data
> EDAC/aspeed: Add AST2700 support
> MAINTAINERS: Add a reviewer for the Aspeed EDAC driver
>
> .../bindings/edac/aspeed,ast2400-sdram-edac.yaml | 6 +-
> MAINTAINERS | 1 +
> drivers/edac/Makefile | 1 +
> drivers/edac/aspeed_edac.c | 426
> ++++++++++++++-------
> 4 files changed, 285 insertions(+), 149 deletions(-)
> ---
> base-commit: 5464985e42c04e335fb30e38fbc409c997db9bec
> change-id: 20260625-edac-8e960e02e7f7
>
> Best regards,
> --
> Ryan Chen <ryan_chen at aspeedtech.com>
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