[PATCH] dt-bindings: iommu: Describe MT8195 infra IRQs

[Rob Herring (Arm)]

The MT8195 infra IOMMU has one fault interrupt per IOMMU bank. Require
the five bank interrupts, named bank0 through bank4, for this
compatible. Keep other MediaTek IOMMUs limited to one unnamed interrupt.

Assisted-by: LLM
Signed-off-by: Rob Herring (Arm) <robh at kernel.org>
---
 .../bindings/iommu/mediatek,iommu.yaml        | 30 ++++++++++++++++++-
 arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  2 ++
 2 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
index 79c573c47b08..4dc5621c17e1 100644
--- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
+++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
@@ -100,7 +100,11 @@ properties:
     maxItems: 1
 
   interrupts:
-    maxItems: 1
+    minItems: 1
+    maxItems: 5
+
+  interrupt-names:
+    description: Names of IOMMU banks providing fault interrupts.
 
   clocks:
     items:
@@ -155,6 +159,30 @@ required:
   - '#iommu-cells'
 
 allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: mediatek,mt8195-iommu-infra
+    then:
+      properties:
+        interrupts:
+          minItems: 5
+        interrupt-names:
+          items:
+            - const: bank0
+            - const: bank1
+            - const: bank2
+            - const: bank3
+            - const: bank4
+      required:
+        - interrupt-names
+    else:
+      properties:
+        interrupts:
+          maxItems: 1
+        interrupt-names: false
+
   - if:
       properties:
         compatible:
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 9aaf8b6edcb5..3e46ffaa44c6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -937,6 +937,8 @@ iommu_infra: infra-iommu at 10315000 {
 				     <GIC_SPI 797 IRQ_TYPE_LEVEL_HIGH 0>,
 				     <GIC_SPI 798 IRQ_TYPE_LEVEL_HIGH 0>,
 				     <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH 0>;
+			interrupt-names = "bank0", "bank1", "bank2", "bank3",
+					  "bank4";
 			#iommu-cells = <1>;
 		};
 
-- 
2.53.0