[PATCH v6 14/17] ARM: dts: microchip: sama7d65: add otpc node

[claudiu beznea]

On 8/6/26 10:40, Varshini Rajendran wrote:
> Add OTPC node along with temperature calibration cell.
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran at microchip.com>
> ---
>   arch/arm/boot/dts/microchip/sama7d65.dtsi | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> index c35f27615bc4..aac2e22d96cb 100644
> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> @@ -15,6 +15,7 @@
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
>   #include <dt-bindings/mfd/at91-usart.h>
> +#include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>

This header is not needed for now. I can drop it while applying, if any.

Other than that:

Reviewed-by: Claudiu Beznea <claudiu.beznea at tuxon.dev>

>   
>   / {
>   	model = "Microchip SAMA7D65 family SoC";
> @@ -1111,6 +1112,21 @@ ddr3phy: ddr3phy at e3804000 {
>   			reg = <0xe3804000 0x1000>;
>   		};
>   
> +		otpc: efuse at e8c00000 {
> +			compatible = "microchip,sama7d65-otpc", "microchip,sama7g5-otpc", "syscon";
> +			reg = <0xe8c00000 0x100>;
> +
> +			nvmem-layout {
> +				compatible = "fixed-layout";
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +
> +				temperature_calib: calib at 41435354 {
> +					reg = <0x41435354 0x2c>;	/* Temp calib data packet TAG */
> +				};
> +			};
> +		};
> +
>   		gic: interrupt-controller at e8c11000 {
>   			compatible = "arm,cortex-a7-gic";
>   			reg = <0xe8c11000 0x1000>,