[PATCH v6 35/49] KVM: arm64: gic-v5: Implement save/restore mechanisms for ISTs

[Marc Zyngier]

On Fri, 04 Sep 2026 12:52:03 +0100,
Sascha Bischoff <Sascha.Bischoff at arm.com> wrote:

Another LKP bot sparse finding at 202609191215.to1MBYak-lkp at intel.com:

> +/*
> + * Save a linear host IST to userspace memory.
> + *
> + * Only the architected 32-bit ISTE state is stored. Metadata is skipped when
> + * striding through the host IST.
> + */
> +static int vgic_v5_save_linear_ist(const struct vgic_v5_ist_desc *ist,
> +				   u32 __user *uaddr, size_t nr_entries)
> +{
> +	__le32 h_iste;
> +	size_t index;
> +	int ret;
> +
> +	vgic_v5_clean_inval(ist->base,
> +			    GICV5_LINEAR_IST_SIZE(ist->id_bits, ist->istsz));
> +
> +	for (index = 0; index < nr_entries; index++) {
> +		__le32 *h_iste_addr = ist->base + index * ist->iste_size;
> +
> +		h_iste = READ_ONCE(*h_iste_addr);
> +		ret = put_user(h_iste, uaddr);

h_iste is an __le32, while uaddr is a pointer to u32. Not great, even
if arm64 BE is now dead. I'll queue this:

@@ -1459,7 +1459,6 @@ static int vgic_v5_get_lpi_ist_desc(struct kvm *kvm,
 static int vgic_v5_save_linear_ist(const struct vgic_v5_ist_desc *ist,
 				   u32 __user *uaddr, size_t nr_entries)
 {
-	__le32 h_iste;
 	size_t index;
 	int ret;
 
@@ -1468,8 +1467,9 @@ static int vgic_v5_save_linear_ist(const struct vgic_v5_ist_desc *ist,
 
 	for (index = 0; index < nr_entries; index++) {
 		__le32 *h_iste_addr = ist->base + index * ist->iste_size;
+		u32 h_iste;
 
-		h_iste = READ_ONCE(*h_iste_addr);
+		h_iste = le32_to_cpu(READ_ONCE(*h_iste_addr));
 		ret = put_user(h_iste, uaddr);
 		if (ret)
 			return ret;

Thanks,

	M.

-- 
Jazz isn't dead. It just smells funny.