[PATCH v2 3/7] arm64: dts: freescale: Add Lino iMX93

[Andrew Lunn]

> I looked into the specific ethernet phy used here, TI DP83867, and
> I would say that the falling edge interrupt should be safe on this
> specific board/phy.

https://www.ti.com/lit/ds/symlink/dp83867ir.pdf

Page 7:

  INTERRUPT: This pin can be programmed as an interrupt output instead
  of a Power down input. In this mode, Interrupts is asserted low
  using this pin.

Also:

  When operating this pin as an interrupt, the pin is an open-drain
  architecture.

This allows you to connect multiple PHYs to one SoC interrupt, shared
interrupts, which again needs level interrupts.

So the datasheet says it is active low.

> What do you think? *IF* my reasoning is correct I would suggest to keep
> the code as it is now.

If you decide to stay with edge, i suggest you put a comment in DT,
something like:

# The PHY data sheet says the interrupt is active low, but the
# interrupt controller does not support level interrupts. Use it as
# falling edge and hope for the best.

	Andrew