[PATCH 01/10] arm64: dts: exynos: axis: Re-order nodes to match coding style

[Krzysztof Kozlowski]

Re-order top-level nodes to match coding style - ordering by the name,
as pointed out by dt-check-style, e.g.:

  artpec8.dtsi:77: [child-name-order] child node 'clock-finpll' out of name order

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>
---
 arch/arm64/boot/dts/exynos/axis/artpec8.dtsi | 32 ++++++++++++++--------------
 arch/arm64/boot/dts/exynos/axis/artpec9.dtsi | 32 ++++++++++++++--------------
 2 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi b/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi
index db9833297982..853b2fafc8d1 100644
--- a/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi
+++ b/arch/arm64/boot/dts/exynos/axis/artpec8.dtsi
@@ -22,6 +22,22 @@ aliases {
 		pinctrl1 = &pinctrl_peric;
 	};
 
+	fin_pll: clock-finpll {
+		compatible = "fixed-factor-clock";
+		clocks = <&osc_clk>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+		clock-output-names = "fin_pll";
+	};
+
+	osc_clk: clock-osc {
+		/* XXTI */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-output-names = "osc_clk";
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -74,22 +90,6 @@ cpu_sleep: cpu-sleep {
 		};
 	};
 
-	fin_pll: clock-finpll {
-		compatible = "fixed-factor-clock";
-		clocks = <&osc_clk>;
-		#clock-cells = <0>;
-		clock-div = <2>;
-		clock-mult = <1>;
-		clock-output-names = "fin_pll";
-	};
-
-	osc_clk: clock-osc {
-		/* XXTI */
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-output-names = "osc_clk";
-	};
-
 	pmu {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi b/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi
index cd46aaf05628..310cafa14f5c 100644
--- a/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi
+++ b/arch/arm64/boot/dts/exynos/axis/artpec9.dtsi
@@ -23,6 +23,22 @@ aliases {
 		pinctrl2 = &pinctrl_peric;
 	};
 
+	fin_pll: clock-finpll {
+		compatible = "fixed-factor-clock";
+		clocks = <&osc_clk>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+		clock-output-names = "fin_pll";
+	};
+
+	osc_clk: clock-osc {
+		/* XXTI */
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-output-names = "osc_clk";
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -91,22 +107,6 @@ cpu_sleep: cpu-sleep {
 		};
 	};
 
-	fin_pll: clock-finpll {
-		compatible = "fixed-factor-clock";
-		clocks = <&osc_clk>;
-		#clock-cells = <0>;
-		clock-div = <2>;
-		clock-mult = <1>;
-		clock-output-names = "fin_pll";
-	};
-
-	osc_clk: clock-osc {
-		/* XXTI */
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-output-names = "osc_clk";
-	};
-
 	pmu {
 		compatible = "arm,cortex-a55-pmu";
 		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;

-- 
2.53.0