[PATCH v5 1/2] dt-bindings: usb: dwc3: Document ST STM32MP2 DWC3 xHCI USB controller

[Fabrice Gasnier]

On 9/10/26 07:22, Marek Vasut wrote:
> The ST STM32MP2 SoC contains single instance of DWC3 USB controller with
> glue logic wrapper around it controlled by syscon. Document the glue
> logic and DWC3 controller.
> 
> Co-developed-by: Pankaj Dev <pankaj.dev at st.com>
> Signed-off-by: Pankaj Dev <pankaj.dev at st.com>
> Co-developed-by: Clément Le Goffic <clement.legoffic at foss.st.com>
> Signed-off-by: Clément Le Goffic <clement.legoffic at foss.st.com>
> Co-developed-by: Gatien Chevallier <gatien.chevallier at foss.st.com>
> Signed-off-by: Gatien Chevallier <gatien.chevallier at foss.st.com>
> Signed-off-by: Marek Vasut <marex at nabladev.com>

Hi Markek,

You can add my:
Acked-by: Fabrice Gasnier <fabrice.gasnier at foss.st.com>

BR,
Fabrice

> ---
> Cc: Alexandre Torgue <alexandre.torgue at foss.st.com>
> Cc: Conor Dooley <conor+dt at kernel.org>
> Cc: Fabrice Gasnier <fabrice.gasnier at foss.st.com>
> Cc: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
> Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
> Cc: Marek Vasut <marex at nabladev.com>
> Cc: Maxime Coquelin <mcoquelin.stm32 at gmail.com>
> Cc: Rob Herring <robh at kernel.org>
> Cc: Thinh Nguyen <Thinh.Nguyen at synopsys.com>
> Cc: devicetree at vger.kernel.org
> Cc: kernel at dh-electronics.com
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-kernel at vger.kernel.org
> Cc: linux-stm32 at st-md-mailman.stormreply.com
> Cc: linux-usb at vger.kernel.org
> ---
> V2: Fix up Sob/Cdb lines
> V3: - Document maximum-speed
>     - Switch resets to maxItems: 1
>     - Drop label from example
>     - Use generic over-current-active-low
>     - Use ref: snps,dwc3-common.yaml and drop generic dr_mode/maximum-speed/phys/phy-names
> V4: - Split this from series arm64: dts: phy: st: usb: Add STM32MP2 USB support
>       https://lore.kernel.org/all/20260822074816.548662-1-marex@nabladev.com/
> V5: No change
> ---
>  .../bindings/usb/st,stm32mp25-dwc3.yaml       | 97 +++++++++++++++++++
>  1 file changed, 97 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml b/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml
> new file mode 100644
> index 0000000000000..96bd557327252
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml
> @@ -0,0 +1,97 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/st,stm32mp25-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: STMicroelectronics STM32 MPU DWC3 USB SoC controller
> +
> +description:
> +  The STM32 MPU DWC3 USB SoC controller block supports both
> +  Host(SS/HS/FS/LS) and Device(SS/HS/FS) mode operation
> +
> +maintainers:
> +  - Fabrice Gasnier <fabrice.gasnier at foss.st.com>
> +  - Marek Vasut <marex at nabladev.com>
> +
> +allOf:
> +  - $ref: snps,dwc3-common.yaml#
> +
> +properties:
> +  compatible:
> +    const: st,stm32mp25-dwc3
> +
> +  reg:
> +    maxItems: 1
> +
> +  access-controllers:
> +    maxItems: 1
> +
> +  clocks:
> +    minItems: 3
> +    maxItems: 3
> +
> +  clock-names:
> +    items:
> +      - const: ref
> +      - const: bus_early
> +      - const: suspend
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +  over-current-active-low:
> +    type: boolean
> +    description: Over-Current signal polarity is active-low
> +
> +  st,syscfg:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    description: Phandle to system configuration controller.
> +    items:
> +      - items:
> +          - description: phandle to syscfg
> +          - description: USB3DR control offset within syscfg
> +
> +  st,enable-port-power-control:
> +    type: boolean
> +    description: Enable Host-Mode Port Power Control (bit-3 of capability param HCCPARAMS)
> +
> +  st,vbusen-active-low:
> +    type: boolean
> +    description: VBUS-ENABLE signal polarity is active-low
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - interrupts
> +  - phys
> +  - phy-names
> +  - resets
> +  - st,syscfg
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/st,stm32mp25-rcc.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/reset/st,stm32mp25-rcc.h>
> +
> +    usb at 48300000 {
> +        compatible = "st,stm32mp25-dwc3";
> +        reg = <0x48300000 0x100000>;
> +        clocks = <&rcc CK_KER_USB2PHY2>, <&rcc CK_BUS_USB3DR>, <&rcc CK_KER_USB2PHY2>;
> +        clock-names = "ref", "bus_early", "suspend";
> +        interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
> +        phys = <&usb2_phy>, <&usb3_phy>;
> +        phy-names = "usb2-phy", "usb3-phy";
> +        resets = <&rcc USB3DR_R>;
> +        over-current-active-low;
> +        st,syscfg = <&syscfg 0x4800>;
> +        st,vbusen-active-low;
> +    };