[RFC PATCH 2/3] arm64: dts: renesas: r9a09g057: Move SDHI nodes into bus nodes
Prabhakar
prabhakar.csengg at gmail.com
Wed Sep 9 12:36:38 PDT 2026
From: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
Wrap sdhi0, sdhi1, and sdhi2 in dedicated "simple-bus" wrapper nodes
(aof_sdhi0_bus, aof_sdhi1_bus, aof_sdhi2_bus), each carrying a dma-ranges
property.
Add dma-ranges to the enclosing bus node instead of the SDHI node itself,
since of_dma_configure() applies a dma-ranges property found on a device's
parent bus node, not one placed directly on the device. Wrapping each SDHI
instance in its own simple-bus node lets each one carry an independent
dma-ranges without affecting its siblings.
The same dma-ranges also let the rz-sysc driver derive the SYS_AOFn address
extension register programming for each SDHI instance, identified by its
MMIO base, per the SoC's address space extension mechanism.
Set each wrapper's dma-ranges to:
dma-ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0xc0000000>;
Leave the corresponding SDHI's low 1 GiB device-side segment
(0x0 - 0x3fffffff, SRAM/peripheral/xSPI/PCIe space) at its
identity-mapped reset default, and remap its remaining 3 GiB device-side
space (0x40000000-0xffffffff) 1:1 onto the same physical range. DDR on
this SoC spans up to 16 GiB starting at 0x40000000 (DDR0 and DDR1
combined), so this 3 GiB range stays entirely within DDR0's native base
and changes nothing for any of the three SDHI instances.
Allow boards that need a different target window (e.g. DDR1, or a
dedicated reserved-memory pool) to override dma-ranges per instance, as
done for SDHI1 on the RZ/V2H EVK in a subsequent commit.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 123 +++++++++++++--------
1 file changed, 75 insertions(+), 48 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index bbaab75681c2..34639106d2cc 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -1577,63 +1577,90 @@ usb3_phy1: usb-phy at 15880000 {
status = "disabled";
};
- sdhi0: mmc at 15c00000 {
- compatible = "renesas,sdhi-r9a09g057";
- reg = <0x0 0x15c00000 0 0x10000>;
- interrupts = <GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 0xa3>, <&cpg CPG_MOD 0xa5>,
- <&cpg CPG_MOD 0xa4>, <&cpg CPG_MOD 0xa6>;
- clock-names = "core", "clkh", "cd", "aclk";
- resets = <&cpg 0xa7>;
- power-domains = <&cpg>;
- status = "disabled";
-
- sdhi0_vqmmc: vqmmc-regulator {
- regulator-name = "SDHI0-VQMMC";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
+ aof_sdhi0_bus: sdhi0-bus {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ dma-ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0xc0000000>;
+
+ sdhi0: mmc at 15c00000 {
+ compatible = "renesas,sdhi-r9a09g057";
+ reg = <0x0 0x15c00000 0 0x10000>;
+ interrupts = <GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 0xa3>, <&cpg CPG_MOD 0xa5>,
+ <&cpg CPG_MOD 0xa4>, <&cpg CPG_MOD 0xa6>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg 0xa7>;
+ power-domains = <&cpg>;
status = "disabled";
+
+ sdhi0_vqmmc: vqmmc-regulator {
+ regulator-name = "SDHI0-VQMMC";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ status = "disabled";
+ };
};
};
- sdhi1: mmc at 15c10000 {
- compatible = "renesas,sdhi-r9a09g057";
- reg = <0x0 0x15c10000 0 0x10000>;
- interrupts = <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 0xa7>, <&cpg CPG_MOD 0xa9>,
- <&cpg CPG_MOD 0xa8>, <&cpg CPG_MOD 0xaa>;
- clock-names = "core", "clkh", "cd", "aclk";
- resets = <&cpg 0xa8>;
- power-domains = <&cpg>;
- status = "disabled";
-
- sdhi1_vqmmc: vqmmc-regulator {
- regulator-name = "SDHI1-VQMMC";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
+ aof_sdhi1_bus: sdhi1-bus {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ dma-ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0xc0000000>;
+
+ sdhi1: mmc at 15c10000 {
+ compatible = "renesas,sdhi-r9a09g057";
+ reg = <0x0 0x15c10000 0 0x10000>;
+ interrupts = <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 0xa7>, <&cpg CPG_MOD 0xa9>,
+ <&cpg CPG_MOD 0xa8>, <&cpg CPG_MOD 0xaa>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg 0xa8>;
+ power-domains = <&cpg>;
status = "disabled";
+
+ sdhi1_vqmmc: vqmmc-regulator {
+ regulator-name = "SDHI1-VQMMC";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ status = "disabled";
+ };
};
};
- sdhi2: mmc at 15c20000 {
- compatible = "renesas,sdhi-r9a09g057";
- reg = <0x0 0x15c20000 0 0x10000>;
- interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 0xab>, <&cpg CPG_MOD 0xad>,
- <&cpg CPG_MOD 0xac>, <&cpg CPG_MOD 0xae>;
- clock-names = "core", "clkh", "cd", "aclk";
- resets = <&cpg 0xa9>;
- power-domains = <&cpg>;
- status = "disabled";
-
- sdhi2_vqmmc: vqmmc-regulator {
- regulator-name = "SDHI2-VQMMC";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
+ aof_sdhi2_bus: sdhi2-bus {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ dma-ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0xc0000000>;
+
+ sdhi2: mmc at 15c20000 {
+ compatible = "renesas,sdhi-r9a09g057";
+ reg = <0x0 0x15c20000 0 0x10000>;
+ interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 0xab>, <&cpg CPG_MOD 0xad>,
+ <&cpg CPG_MOD 0xac>, <&cpg CPG_MOD 0xae>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg 0xa9>;
+ power-domains = <&cpg>;
status = "disabled";
+
+ sdhi2_vqmmc: vqmmc-regulator {
+ regulator-name = "SDHI2-VQMMC";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ status = "disabled";
+ };
};
};
--
2.55.0
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