[PATCH v2 3/6] mmc: sdhci-of-at91: add LAN969x support

[Adrian Hunter]

On 07/09/2026 16:25, Robert Marko wrote:
> LAN969x uses the same internally generated base clock layout as SAM9X60,
> but its SDMMC controller stops responding when runtime PM gates its clocks.
> Software resets then fail to complete and the internal SDHCI clock never
> stabilises, causing subsequent I/O requests to time out.

Is this a known issue of the SoC?  Is there perhaps a hardware reset
for the controller that would bring it back to life?

Does that mean unbind and rebind of the device from the driver
also does not work?

> 
> Add LAN969x-specific SoC data using the SAM9X60 clock layout and select the
> option to leave its clocks enabled across runtime suspend.
> 
> Signed-off-by: Robert Marko <robert.marko at sartura.hr>
> 
>  drivers/mmc/host/sdhci-of-at91.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c
> index b7e2a89da348..e7affca8da25 100644
> --- a/drivers/mmc/host/sdhci-of-at91.c
> +++ b/drivers/mmc/host/sdhci-of-at91.c
> @@ -158,9 +158,17 @@ static const struct sdhci_at91_soc_data soc_data_sam9x60 = {
>  	.divider_for_baseclk = 2,
>  };
>  
> +static const struct sdhci_at91_soc_data soc_data_lan969x = {
> +	.pdata = &sdhci_sama5d2_pdata,
> +	.baseclk_is_generated_internally = true,

Should be a comment here explaining the issue that needs
keep_clks_on = true

> +	.keep_clks_on = true,
> +	.divider_for_baseclk = 2,
> +};
> +
>  static const struct of_device_id sdhci_at91_dt_match[] = {
>  	{ .compatible = "atmel,sama5d2-sdhci", .data = &soc_data_sama5d2 },
>  	{ .compatible = "microchip,sam9x60-sdhci", .data = &soc_data_sam9x60 },
> +	{ .compatible = "microchip,lan9691-sdhci", .data = &soc_data_lan969x },
>  	{}
>  };
>  MODULE_DEVICE_TABLE(of, sdhci_at91_dt_match);