[PATCH 08/13] arm64: dts: apple: t6030: Fix most property-order dt-style-check issues
Janne Grunau
j at jannau.net
Wed Sep 9 03:27:04 PDT 2026
t6030-pmgr.dtsi is left unchanged because future additions or
modifications will be sparse.
Not fixed are
| [property-order] property 'd-cache-size' out of canonical order (should sort before 'enable-method')
for all CPU nodes to keep cache related properties together. A blank
line is added before 'd-cache-size' to attenuate this grouping for human
consumption.
Signed-off-by: Janne Grunau <j at jannau.net>
---
arch/arm64/boot/dts/apple/t6030.dtsi | 218 ++++++++++++++++++-----------------
1 file changed, 113 insertions(+), 105 deletions(-)
diff --git a/arch/arm64/boot/dts/apple/t6030.dtsi b/arch/arm64/boot/dts/apple/t6030.dtsi
index 0b5824c9f1bf..71b75a59f695 100644
--- a/arch/arm64/boot/dts/apple/t6030.dtsi
+++ b/arch/arm64/boot/dts/apple/t6030.dtsi
@@ -81,179 +81,190 @@ core5 {
};
cpu_e00: cpu at 0 {
- compatible = "apple,sawtooth";
device_type = "cpu";
+ compatible = "apple,sawtooth";
reg = <0x0 0x0>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
- next-level-cache = <&l2_cache_0>;
- i-cache-size = <0x20000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x10000>;
+ i-cache-size = <0x20000>;
+ next-level-cache = <&l2_cache_0>;
};
cpu_e01: cpu at 1 {
- compatible = "apple,sawtooth";
device_type = "cpu";
+ compatible = "apple,sawtooth";
reg = <0x0 0x1>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
- next-level-cache = <&l2_cache_0>;
- i-cache-size = <0x20000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x10000>;
+ i-cache-size = <0x20000>;
+ next-level-cache = <&l2_cache_0>;
};
cpu_e02: cpu at 2 {
- compatible = "apple,sawtooth";
device_type = "cpu";
+ compatible = "apple,sawtooth";
reg = <0x0 0x2>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
- next-level-cache = <&l2_cache_0>;
- i-cache-size = <0x20000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x10000>;
+ i-cache-size = <0x20000>;
+ next-level-cache = <&l2_cache_0>;
};
cpu_e03: cpu at 3 {
- compatible = "apple,sawtooth";
device_type = "cpu";
+ compatible = "apple,sawtooth";
reg = <0x0 0x3>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
- next-level-cache = <&l2_cache_0>;
- i-cache-size = <0x20000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x10000>;
+ i-cache-size = <0x20000>;
+ next-level-cache = <&l2_cache_0>;
};
cpu_e04: cpu at 4 {
- compatible = "apple,sawtooth";
device_type = "cpu";
+ compatible = "apple,sawtooth";
reg = <0x0 0x4>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
- next-level-cache = <&l2_cache_0>;
- i-cache-size = <0x20000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x10000>;
+ i-cache-size = <0x20000>;
+ next-level-cache = <&l2_cache_0>;
};
cpu_e05: cpu at 5 {
- compatible = "apple,sawtooth";
device_type = "cpu";
+ compatible = "apple,sawtooth";
reg = <0x0 0x5>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* to be filled by loader */
- next-level-cache = <&l2_cache_0>;
- i-cache-size = <0x20000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x10000>;
+ i-cache-size = <0x20000>;
+ next-level-cache = <&l2_cache_0>;
};
cpu_p00: cpu at 10100 {
- compatible = "apple,everest";
device_type = "cpu";
+ compatible = "apple,everest";
reg = <0x0 0x10100>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
- next-level-cache = <&l2_cache_1>;
- i-cache-size = <0x30000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x20000>;
+ i-cache-size = <0x30000>;
+ next-level-cache = <&l2_cache_1>;
};
cpu_p01: cpu at 10101 {
- compatible = "apple,everest";
device_type = "cpu";
+ compatible = "apple,everest";
reg = <0x0 0x10101>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
- next-level-cache = <&l2_cache_1>;
- i-cache-size = <0x30000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x20000>;
+ i-cache-size = <0x30000>;
+ next-level-cache = <&l2_cache_1>;
};
cpu_p02: cpu at 10102 {
- compatible = "apple,everest";
device_type = "cpu";
+ compatible = "apple,everest";
reg = <0x0 0x10102>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
- next-level-cache = <&l2_cache_1>;
- i-cache-size = <0x30000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x20000>;
+ i-cache-size = <0x30000>;
+ next-level-cache = <&l2_cache_1>;
};
cpu_p03: cpu at 10103 {
- compatible = "apple,everest";
device_type = "cpu";
+ compatible = "apple,everest";
reg = <0x0 0x10103>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
- next-level-cache = <&l2_cache_1>;
- i-cache-size = <0x30000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x20000>;
+ i-cache-size = <0x30000>;
+ next-level-cache = <&l2_cache_1>;
};
cpu_p04: cpu at 10104 {
- compatible = "apple,everest";
device_type = "cpu";
+ compatible = "apple,everest";
reg = <0x0 0x10104>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
- next-level-cache = <&l2_cache_1>;
- i-cache-size = <0x30000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x20000>;
+ i-cache-size = <0x30000>;
+ next-level-cache = <&l2_cache_1>;
};
cpu_p05: cpu at 10105 {
- compatible = "apple,everest";
device_type = "cpu";
+ compatible = "apple,everest";
reg = <0x0 0x10105>;
- enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
- next-level-cache = <&l2_cache_1>;
- i-cache-size = <0x30000>;
+ enable-method = "spin-table";
+
d-cache-size = <0x20000>;
+ i-cache-size = <0x30000>;
+ next-level-cache = <&l2_cache_1>;
};
l2_cache_0: l2-cache-0 {
compatible = "cache";
cache-level = <2>;
- cache-unified;
cache-size = <0x400000>;
+ cache-unified;
};
l2_cache_1: l2-cache-1 {
compatible = "cache";
cache-level = <2>;
- cache-unified;
cache-size = <0x1000000>;
+ cache-unified;
};
};
reserved-memory {
+ ranges;
#address-cells = <2>;
#size-cells = <2>;
- ranges;
};
soc: soc {
compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
-
ranges;
- nonposted-mmio;
+ #address-cells = <2>;
/* Required to get >32-bit DMA via DARTs */
dma-ranges = <0 0 0 0 0xffffffff 0xffffc000>;
+ nonposted-mmio;
+ #size-cells = <2>;
i2c1: i2c at 289014000 {
compatible = "apple,t6030-i2c", "apple,t8103-i2c";
reg = <0x2 0x89014000 0x0 0x4000>;
+ #address-cells = <0x1>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 890 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
power-domains = <&ps_i2c1>;
+ #size-cells = <0x0>;
status = "disabled";
};
@@ -261,14 +272,14 @@ i2c1: i2c at 289014000 {
i2c2: i2c at 289018000 {
compatible = "apple,t6030-i2c", "apple,t8103-i2c";
reg = <0x2 0x89018000 0x0 0x4000>;
+ #address-cells = <0x1>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 891 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
power-domains = <&ps_i2c2>;
+ #size-cells = <0x0>;
status = "disabled";
};
@@ -276,14 +287,14 @@ i2c2: i2c at 289018000 {
i2c3: i2c at 28901c000 {
compatible = "apple,t6030-i2c", "apple,t8103-i2c";
reg = <0x2 0x8901c000 0x0 0x4000>;
+ #address-cells = <0x1>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 892 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
power-domains = <&ps_i2c3>;
+ #size-cells = <0x0>;
status = "disabled";
};
@@ -291,14 +302,14 @@ i2c3: i2c at 28901c000 {
i2c4: i2c at 289020000 {
compatible = "apple,t6030-i2c", "apple,t8103-i2c";
reg = <0x2 0x89020000 0x0 0x4000>;
+ #address-cells = <0x1>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 893 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c4_pins>;
pinctrl-names = "default";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
power-domains = <&ps_i2c4>;
+ #size-cells = <0x0>;
status = "disabled";
};
@@ -306,14 +317,14 @@ i2c4: i2c at 289020000 {
i2c6: i2c at 289028000 {
compatible = "apple,t6030-i2c", "apple,t8103-i2c";
reg = <0x2 0x89028000 0x0 0x4000>;
+ #address-cells = <0x1>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 895 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c6_pins>;
pinctrl-names = "default";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
power-domains = <&ps_i2c6>;
+ #size-cells = <0x0>;
status = "disabled";
};
@@ -321,14 +332,14 @@ i2c6: i2c at 289028000 {
i2c8: i2c at 289030000 {
compatible = "apple,t6030-i2c", "apple,t8103-i2c";
reg = <0x2 0x89030000 0x0 0x4000>;
+ #address-cells = <0x1>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 897 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c8_pins>;
pinctrl-names = "default";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
power-domains = <&ps_i2c8>;
+ #size-cells = <0x0>;
status = "disabled";
};
@@ -336,8 +347,8 @@ i2c8: i2c at 289030000 {
fpwm0: pwm at 289040000 {
compatible = "apple,t6030-fpwm", "apple,s5l-fpwm";
reg = <0x2 0x89040000 0x0 0x4000>;
- power-domains = <&ps_fpwm0>;
clocks = <&clkref>;
+ power-domains = <&ps_fpwm0>;
#pwm-cells = <2>;
status = "disabled";
@@ -346,26 +357,25 @@ fpwm0: pwm at 289040000 {
serial0: serial at 289200000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x89200000 0x0 0x1000>;
- reg-io-width = <4>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 866 IRQ_TYPE_LEVEL_HIGH>;
/*
* TODO: figure out the clocking properly, there may
* be a third selectable clock.
*/
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 866 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_uart0>;
+ reg-io-width = <4>;
status = "disabled";
};
pmgr_gfx: power-management at 290e80000 {
compatible = "apple,t6030-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
+ reg = <0x2 0x90e80000 0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
-
- reg = <0x2 0x90e80000 0 0x4000>;
/* child nodes are added in t6030-pmgr.dtsi */
};
@@ -373,6 +383,12 @@ pinctrl_ap: pinctrl at 347100000 {
compatible = "apple,t6030-pinctrl", "apple,t8103-pinctrl";
reg = <0x3 0x47100000 0x0 0x4000>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl_ap 0 0 224>;
+
+ #interrupt-cells = <2>;
+ interrupt-controller;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>,
@@ -383,15 +399,8 @@ pinctrl_ap: pinctrl at 347100000 {
<AIC_IRQ 279 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_gpio>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_ap 0 0 224>;
apple,npins = <224>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(37, 1)>,
<APPLE_PINMUX(36, 1)>;
@@ -425,21 +434,20 @@ i2c8_pins: i2c8-pins {
pmgr: power-management at 350700000 {
compatible = "apple,t6030-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
+ reg = <0x3 0x50700000 0 0x14000>;
#address-cells = <1>;
#size-cells = <1>;
-
- reg = <0x3 0x50700000 0 0x14000>;
/* child nodes are added in t6030-pmgr.dtsi */
};
aic: interrupt-controller at 351000000 {
compatible = "apple,t6030-aic3", "apple,t8122-aic3";
- #interrupt-cells = <3>;
- interrupt-controller;
-
reg = <0x3 0x51000000 0x0 0x184000>,
<0x3 0x51040000 0x0 0x4000>;
reg-names = "core", "event";
+
+ #interrupt-cells = <3>;
+ interrupt-controller;
power-domains = <&ps_aic>;
};
@@ -447,6 +455,12 @@ pinctrl_nub: pinctrl at 3641f0000 {
compatible = "apple,t6030-pinctrl", "apple,t8103-pinctrl";
reg = <0x3 0x641f0000 0x0 0x4000>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl_nub 0 0 37>;
+
+ #interrupt-cells = <2>;
+ interrupt-controller;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 472 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 473 IRQ_TYPE_LEVEL_HIGH>,
@@ -456,21 +470,14 @@ pinctrl_nub: pinctrl at 3641f0000 {
<AIC_IRQ 477 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 478 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_nub 0 0 37>;
apple,npins = <37>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
};
pmgr_mini: power-management at 364280000 {
compatible = "apple,t6030-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd";
+ reg = <0x3 0x64280000 0 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
-
- reg = <0x3 0x64280000 0 0x4000>;
/* child nodes are added in t6030-pmgr.dtsi */
};
@@ -486,13 +493,12 @@ pinctrl_smc: pinctrl at 36c820000 {
compatible = "apple,t6030-pinctrl", "apple,t8103-pinctrl";
reg = <0x3 0x6c820000 0x0 0x4000>;
- gpio-controller;
#gpio-cells = <2>;
+ gpio-controller;
gpio-ranges = <&pinctrl_smc 0 0 18>;
- apple,npins = <18>;
- interrupt-controller;
#interrupt-cells = <2>;
+ interrupt-controller;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 545 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 546 IRQ_TYPE_LEVEL_HIGH>,
@@ -501,12 +507,22 @@ pinctrl_smc: pinctrl at 36c820000 {
<AIC_IRQ 549 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 550 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 551 IRQ_TYPE_LEVEL_HIGH>;
+
+ apple,npins = <18>;
};
pinctrl_aop: pinctrl at 374824000 {
compatible = "apple,t6030-pinctrl", "apple,t8103-pinctrl";
reg = <0x3 0x74824000 0x0 0x4000>;
+ clocks = <&clkref>;
+
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl_aop 0 0 54>;
+
+ #interrupt-cells = <2>;
+ interrupt-controller;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
@@ -516,26 +532,18 @@ pinctrl_aop: pinctrl at 374824000 {
<AIC_IRQ 399 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 400 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkref>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_aop 0 0 54>;
apple,npins = <54>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
- interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
};
};
--
2.55.0
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