[PATCH v5 0/8] Add support for mt8167 toprgu and mmsys resets

[AngeloGioacchino Del Regno]

On 9/8/26 19:38, Luca Leonardo Scorcia wrote:
> Currently mt8167 inherits its watchdog from the included mt8516 dtsi,
> which in turn falls back on mt6589-wdt, which does not support toprgu
> resets yet. In the first two patches we add support for the 12 mt6589
> toprgu resets.
> 
> However, according to its data sheet, mt8167 has 14 sw resets instead of
> 12, and its reset bits are non-contiguous. This is currently unsupported
> by the mtk-wdt driver and it caused confusion between reset IDs and reset
> bits in other mtk SoCs device tree includes.
> 
> Therefore we introduce a dedicated mediatek,mt8167-wdt compatible for the
> watchdog driver that describes correctly this SoC's resets. Since its
> reset bits are non-contiguous, we add support for a watchdog reset table
> to accommodate the distinction between device tree reset IDs and the
> actual bits in the registers. Code is inspired by the reset table
> currently implemented in the mmsys driver. There should be no effect
> on existing sequential wdt resets.
> 
> In the last three patches we describe the mmsys reset table for the SoC.
> According to the datasheet there are 28 mmsys reset bits divided across
> two adjacent registers.
> 
> The series has been tested on a Sony PlayStation Classic Mini, on a Xiaomi
> Mi Smart Clock and on a Lenovo Smart Clock 2.
> 

Whole series is

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>


> Changes in v5:
> - Dropped the binding header for mt6589 reset IDs;
> - Moved the definition of the number of resets for mt6589 inside
>    mtk-wdt driver;
> - Separated the mmsys related changes to the last three commits.
> 
> Changes in v4 [4]:
> - Squashed the reset IDs includes together with the bindings change;
> - Added support for a reset table to the mtk-wdt driver. This allows us
>    to decouple reset IDs from device trees from reset bits and lets us
>    describe correctly the non-contiguous reset bits of mt8167;
> - Improved explanations in commit messages.
> 
> Changes in v3 [3]:
> - Improved explanations in the commit messages;
> - Added the #reset-cells property to mt6589 watchdog node;
> - Included the mediatek,mt6589-resets.h file in mt6589.dtsi;
> - Included the mediatek,mt8167-resets.h file in mt8167.dtsi;
> - Moved the mmsys reset table from the mt8167-mmsys.h header file to
>    the mmsys driver implementation.
> 
> Changes in v2 [2]:
> - Sashiko pointed out correctly a missing entry in the mmsys reset table
>    in the last patch.
> 
> Initial version: [1]
> 
> [1] https://lore.kernel.org/linux-mediatek/20260717151134.678839-1-l.scorcia@gmail.com/
> [2] https://lore.kernel.org/linux-mediatek/20260717163959.714561-1-l.scorcia@gmail.com/
> [3] https://lore.kernel.org/linux-mediatek/20260809160643.33991-1-l.scorcia@gmail.com/
> [4] https://lore.kernel.org/linux-mediatek/20260819101853.44681-1-l.scorcia@gmail.com/
> 
> Luca Leonardo Scorcia (8):
>    watchdog: mediatek: Add wdt/toprgu resets for mt6589
>    arm: dts: mediatek: mt6589: Enable toprgu reset controller
>    dt-bindings: watchdog: Add compatible for MediaTek mt8167
>    watchdog: mediatek: Add support for mt8167 toprgu/watchdog
>    arm64: dts: mt8167: Properly describe the SoC watchdog resets
>    dt-bindings: reset: Add mmsys reset ids for mt8167
>    soc: mediatek: mtk-mmsys: Add resets for mt8167
>    arm64: dts: mt8167: Add support for mmsys resets
> 
>   .../bindings/watchdog/mediatek,mtk-wdt.yaml   |  1 +
>   arch/arm/boot/dts/mediatek/mt6589.dtsi        |  1 +
>   arch/arm64/boot/dts/mediatek/mt8167.dtsi      |  9 ++++
>   drivers/soc/mediatek/mt8167-mmsys.h           |  3 ++
>   drivers/soc/mediatek/mtk-mmsys.c              | 38 +++++++++++++
>   drivers/watchdog/mtk_wdt.c                    | 54 +++++++++++++++++--
>   .../dt-bindings/reset/mediatek,mt8167-mmsys.h | 35 ++++++++++++
>   .../dt-bindings/reset/mediatek,mt8167-wdt.h   | 21 ++++++++
>   8 files changed, 157 insertions(+), 5 deletions(-)
>   create mode 100644 include/dt-bindings/reset/mediatek,mt8167-mmsys.h
>   create mode 100644 include/dt-bindings/reset/mediatek,mt8167-wdt.h
>