[PATCH v6 04/10] PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode

[Shawn Lin]

在 2026/09/08 星期二 22:51, Sebastian Reichel 写道:
> Remove code duplication and improve readability by introducing a new
> function to setup the enhanced LTSSM mode.
> 

Reviewed-by: Shawn Lin <shawn.lin at rock-chips.com>

> Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>
> ---
>   drivers/pci/controller/dwc/pcie-dw-rockchip.c | 24 ++++++++++++++----------
>   1 file changed, 14 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index 7472ec78b473..6f84b07406d4 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -696,6 +696,18 @@ static irqreturn_t rockchip_pcie_ep_sys_irq_thread(int irq, void *arg)
>   	return IRQ_HANDLED;
>   }
>   
> +static void rockchip_pcie_enable_enhanced_ltssm_control_mode(struct rockchip_pcie *rockchip,
> +							     u32 flags)
> +{
> +	u32 val;
> +
> +	/* Enable the enhanced control mode of signal app_ltssm_enable */
> +	val = FIELD_PREP_WM16(PCIE_LTSSM_ENABLE_ENHANCE, 1);
> +	if (flags)
> +		val |= FIELD_PREP_WM16(flags, 1);
> +	rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> +}
> +
>   static int rockchip_pcie_configure_rc(struct platform_device *pdev,
>   				      struct rockchip_pcie *rockchip)
>   {
> @@ -719,9 +731,7 @@ static int rockchip_pcie_configure_rc(struct platform_device *pdev,
>   		return ret;
>   	}
>   
> -	/* LTSSM enable control mode */
> -	val = FIELD_PREP_WM16(PCIE_LTSSM_ENABLE_ENHANCE, 1);
> -	rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> +	rockchip_pcie_enable_enhanced_ltssm_control_mode(rockchip, 0);
>   
>   	rockchip_pcie_writel_apb(rockchip,
>   				 PCIE_CLIENT_SET_MODE(PCIE_CLIENT_MODE_RC),
> @@ -765,13 +775,7 @@ static int rockchip_pcie_configure_ep(struct platform_device *pdev,
>   		return ret;
>   	}
>   
> -	/*
> -	 * LTSSM enable control mode, and automatically delay link training on
> -	 * hot reset/link-down reset.
> -	 */
> -	val = FIELD_PREP_WM16(PCIE_LTSSM_ENABLE_ENHANCE, 1) |
> -	      FIELD_PREP_WM16(PCIE_LTSSM_APP_DLY2_EN, 1);
> -	rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> +	rockchip_pcie_enable_enhanced_ltssm_control_mode(rockchip, PCIE_LTSSM_APP_DLY2_EN);
>   
>   	rockchip_pcie_writel_apb(rockchip,
>   				 PCIE_CLIENT_SET_MODE(PCIE_CLIENT_MODE_EP),
>