[PATCH] arm64: dts: renesas: sparrow-hawk: Add overlay for WaveShare 2CH CANFD HAT

[Geert Uytterhoeven]

Hi Marek,

On Sat, 8 Aug 2026 at 04:57, Marek Vasut
<marek.vasut+renesas at mailbox.org> wrote:
> Add a DT overlay to bind the WaveShare 2-Channel Isolated CAN FD
> Expansion HAT on the Retronix R-Car V4H Sparrow Hawk board.
>
> Current device link is at https://www.waveshare.com/2-ch-can-fd-hat.htm
>
> Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>

Thanks for your patch!

> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk-ws-2ch-canfd.dtso

> +&{/} {
> +       /* Fixed clock dedicated to SPI CAN on 2-CH CAN FD HAT */
> +       clk_can0: clk-ws-2ch-canfd0 {
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <40000000>;
> +       };
> +
> +       clk_can1: clk-ws-2ch-canfd1 {
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <40000000>;
> +       };
> +
> +       /*
> +        * SPI_1 is operated as GPIO SPI, because MSIOF5 can not be
> +        * muxed on the pins allocated for SPI_1 on this CANFD HAT.
> +        */
> +       spi-ws-2ch-canfd {      /* SPI_1 */
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +               compatible = "spi-gpio";

Please list the "compatible" property first (everywhere).

> +               sck-gpios = <&gpio0 10 0>;              /* CN7 pin 40 */
> +               miso-gpios = <&gpio0 9 0>;              /* CN7 pin 35 */
> +               mosi-gpios = <&gpio0 12 0>;             /* CN7 pin 38 */
> +               cs-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; /* CN7 pin 12 */
> +               num-chipselects = <1>;
> +
> +               can at 0 {
> +                       compatible = "microchip,mcp2518fd";
> +                       clocks = <&clk_can1>;
> +                       /* CN7 pin 18 */
> +                       interrupts-extended = <&gpio1 25 IRQ_TYPE_EDGE_FALLING>;

Datasheet says active low, so IRQ_TYPE_LEVEL_LOW.

> +                       reg = <0>;

Please list the "reg" property second (everywhere).

> +                       spi-max-frequency = <20000000>;
> +               };
> +       };
> +};
> +
> +&msiof0 {      /* SPI_0 */
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +       pinctrl-0 = <&msiof0_pins>;
> +       pinctrl-names = "default";
> +       status = "okay";
> +
> +       /*
> +        * Native MSIOF chipselect does not work with MCP2518FD
> +        * because MCP251xFD driver needs to keep the chipselect
> +        * line asserted between transfers. This requirement is
> +        * fulfilled only by using GPIO chipselect.
> +        */
> +       cs-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
> +
> +       can at 0 {
> +               compatible = "microchip,mcp2518fd";
> +               clocks = <&clk_can0>;

Please insert a comment "/* CN7 pin 22 */".

> +               interrupts-extended = <&gpio1 26 IRQ_TYPE_EDGE_FALLING>;

IRQ_TYPE_LEVEL_LOW.

> +               reg = <0>;
> +               spi-max-frequency = <20000000>;
> +       };
> +};
> +
> +&pfc {
> +       msiof0_pins: spi-ws-2ch-canfd0 {        /* SPI_0 */

Node name should be "msiof0".

> +               groups = "msiof0_clk", "msiof0_txd", "msiof0_rxd";
> +               function = "msiof0";
> +       };
> +};
> +
> +/*
> + * PWM1 uses PWM1_B pin configuration for pin GP2_13. This conflicts
> + * with SPI_1 CE_1 signal which is also on pin GP2_13. Disable PWM1
> + * in case this hat is in use.
> + */
> +&pwm1 {
> +       status = "disabled";
> +};

Please move this node disabling pwm1 to the top, for compatibility
with dynamic DT overlays.

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds