[PATCH v5 1/9] iommu/arm-smmu-v3: Handle ARM erratum for CONT under invalidation with SVA

[Jason Gunthorpe]

On Mon, Sep 07, 2026 at 02:21:44PM +0000, Mostafa Saleh wrote:
> > +static bool arm_smmu_cmdq_batch_add_ril(struct arm_smmu_device *smmu,
> > +					struct arm_smmu_cmdq_batch *cmds,
> > +					struct arm_smmu_cmd *cmd,
> > +					unsigned long iova, size_t size,
> > +					u8 tgsz_lg2)
> > +{
> > +	u64 cur_tg = iova >> tgsz_lg2;
> 
> Nit: tg suffix is a bit confusing, I guess pfn is more accurate, but
> no strong opinion.

I don't want to use pfn in any of this code because convention has PFN
as PAGE_SIZE, while this is a "translation granule", ie the base
granule size of the iommu domain. Which are not always the same thing..

Jason