[PATCH v5 08/31] clk: at91: clk-master: use clk_parent_data

Claudiu Beznea claudiu.beznea at tuxon.dev
Sat Jan 31 06:29:12 PST 2026



On 1/16/26 22:07, ryan.wanner at microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea at tuxon.dev>
> 
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures.
> 
> __clk_get_hw will be removed in subsequent patches.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea at tuxon.dev>
> [ryan.wanner at microchip.com: Add clk-master changes to SAM9X75 and
> SAMA7D65 SoCs. As well as add md_slck commit message.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner at microchip.com>
> ---

[ ... ]

> @@ -1212,7 +1212,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>   	}
>   
>   	hw = at91_clk_register_master_div(regmap, "mck0", NULL,
> -					  sama7d65_plls[PLL_ID_CPU][1].hw,
> +					  &AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_CPU][1].hw),
>   					  &mck0_layout, &mck0_characteristics,
>   					  &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
>   	if (IS_ERR(hw))
> @@ -1221,12 +1221,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>   	sama7d65_pmc->chws[PMC_MCK] = hw;
>   	sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;
>   
> -	parent_hws[0] = md_slck_hw;
> -	parent_hws[1] = td_slck_hw;
> -	parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
> +	parent_data[0] = AT91_CLK_PD_NAME("md_slck");
> +	parent_data[1] = AT91_CLK_PD_NAME("td_slck");
> +	parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
>   	for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
>   		u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
> -		struct clk_hw *tmp_parent_hws[8];
>   		u32 *mux_table;
>   
>   		mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
> @@ -1243,13 +1242,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>   			u8 pll_id = sama7d65_mckx[i].ep[j].pll_id;
>   			u8 pll_compid = sama7d65_mckx[i].ep[j].pll_compid;
>   
> -			tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw;
> +			parent_data[3 + j] = AT91_CLK_PD_HW(sama7d65_plls[pll_id][pll_compid].hw);
>   		}
> -		PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
> -			       sama7d65_mckx[i].ep_count);

Could you please move this to a different patch? Same for sama7g5.c file.

The rest LGTM.



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