[PATCH v4 32/36] irqchip/gic-v5: Check if impl is virt capable

[Sascha Bischoff]

On Fri, 2026-01-30 at 11:14 +0000, Marc Zyngier wrote:
> On Wed, 28 Jan 2026 18:07:33 +0000,
> Sascha Bischoff <Sascha.Bischoff at arm.com> wrote:
> > 
> > Now that there is support for creating a GICv5-based guest with
> > KVM,
> > check that the hardware itself supports virtualisation, skipping
> > the
> > setting of struct gic_kvm_info if not.
> > 
> > Note: If native GICv5 virt is not supported, then nor is
> > FEAT_GCIE_LEGACY, so we are able to skip altogether.
> > 
> > Signed-off-by: Sascha Bischoff <sascha.bischoff at arm.com>
> > Reviewed-by: Lorenzo Pieralisi <lpieralisi at kernel.org>
> > Reviewed-by: Jonathan Cameron <jonathan.cameron at huawei.com>
> > ---
> >  drivers/irqchip/irq-gic-v5-irs.c   |  4 ++++
> >  drivers/irqchip/irq-gic-v5.c       | 10 ++++++++++
> >  include/linux/irqchip/arm-gic-v5.h |  4 ++++
> >  3 files changed, 18 insertions(+)
> > 
> > diff --git a/drivers/irqchip/irq-gic-v5-irs.c
> > b/drivers/irqchip/irq-gic-v5-irs.c
> > index ce2732d649a3..eebf9f219ac8 100644
> > --- a/drivers/irqchip/irq-gic-v5-irs.c
> > +++ b/drivers/irqchip/irq-gic-v5-irs.c
> > @@ -744,6 +744,10 @@ static int __init gicv5_irs_init(struct
> > device_node *node)
> >  	 */
> >  	if (list_empty(&irs_nodes)) {
> >  
> > +		idr = irs_readl_relaxed(irs_data, GICV5_IRS_IDR0);
> > +		gicv5_global_data.virt_capable =
> > +			!!FIELD_GET(GICV5_IRS_IDR0_VIRT, idr);
> > +
> 
> I'll tidy-up this while cherry-picking it (spurious newline before
> the
> hunk, horrible split assignment...).

Apologies! Thanks for doing that!

Sascha

> 
> Thanks,
> 
> 	M.
>