[PATCH v2] arm64: mm: fix pass user prot to ioremap_prot in generic_access_phys

[Catalin Marinas]

On Wed, Jan 28, 2026 at 03:12:56PM +0800, Jinjiang Tu wrote:
> 在 2026/1/27 17:01, Jinjiang Tu 写道:
> > diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
> > index 83e03abbb2ca..fe8607eafab6 100644
> > --- a/arch/arm64/include/asm/io.h
> > +++ b/arch/arm64/include/asm/io.h
> > @@ -267,6 +267,17 @@ int arm64_ioremap_prot_hook_register(const ioremap_prot_hook_t hook);
> >   #define ioremap_prot ioremap_prot
> > +#define arch_mk_kernel_prot arch_mk_kernel_prot
> > +static inline pgprot_t arch_mk_kernel_prot(pgprot_t user_prot)
> > +{
> > +	unsigned long kernel_prot_val;
> > +
> > +	kernel_prot_val = _PAGE_KERNEL & ~(PTE_WRITE | PTE_ATTRINDX_MASK);
> > +	kernel_prot_val |= pgprot_val(user_prot) & (PTE_WRITE | PTE_ATTRINDX_MASK);
> > +
> > +	return __pgprot(kernel_prot_val);
> > +}
> 
> I found I misunderstand the READ/WRITE permisson here.
> If the pte is writeale, the PTE_WRITE is 1, and PTE_RDONLY means dirty or not (With DBM).
> If the pte is read-only, the PTE_WRITE is 0, and PTE_RDONLY is 1.
> 
> Since generic_access_phys() have checked if the user can write with:
> 
> 		if ((write & FOLL_WRITE) && !pte_write(pte))
> 		return -EINVAL;
> 
> So, maybe we could always grant writable permission, just as x86's ioremap() does?

Yes, it gets tricky with the dirty/writeable bits and we may change this
in the future. We have follow_pfnmap_start() already checking the
permissions, so going for read/write access for the kernel mapping I
think makes sense. Just do something like:

	ptdesc_t mem_type = pgprot_val(user_prot) & PTE_ATTRINDX_MASK;

	return __pgprot_modify(PAGE_KERNEL, PTE_ATTRINDX_MASK, mem_type);

-- 
Catalin