[PATCH 1/3] arm64: dts: imx93-9x9-qsb: change usdhc tuning step for eMMC and SD

[Frank Li]

On Wed, Jan 28, 2026 at 03:35:30PM +0800, ziniu.wang_1 at nxp.com wrote:
> From: Luke Wang <ziniu.wang_1 at nxp.com>
>
> For eMMC and SD, there are two tuning pass windows and the gap between
> those two windows may only have one cell. If tuning step > 1, the gap may
> just be skipped and host assumes those two windows as a continuous
> windows. This will cause a bad delay cell near the gap to be selected.

Suppose you meet problem with default settings. It'd better descript what
problem you met.

>
> For SDIO, the gap is big enough, default tuning step is fine.

For SDIO, the gap is sufficiently large, so the default tuning step does
not cause this issue.

>
> Signed-off-by: Luke Wang <ziniu.wang_1 at nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
> index 0852067eab2c..197c8f8b7f66 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
> @@ -507,6 +507,7 @@ &usdhc1 {
>  	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
>  	bus-width = <8>;
>  	non-removable;
> +	fsl,tuning-step = <1>;
>  	status = "okay";
>  };
>
> @@ -519,6 +520,7 @@ &usdhc2 {
>  	vmmc-supply = <&reg_usdhc2_vmmc>;
>  	bus-width = <4>;
>  	no-mmc;
> +	fsl,tuning-step = <1>;
>  	status = "okay";
>  };
>
> --
> 2.34.1
>