[PATCH] clk: imx8mq: Correct the CSI PHY sels

Peng Fan peng.fan at oss.nxp.com
Tue Jan 27 21:56:25 PST 2026


On Wed, Jan 28, 2026 at 12:47:21AM +0100, Sebastian Krzyszkowiak wrote:
>According to i.MX 8M Quad Reference Manual (Section 5.1.2 Table 5-1)
>MIPI_CSI1_PHY_REF_CLK_ROOT and MIPI_CSI2_PHY_REF_CLK_ROOT have
>SYSTEM_PLL2_DIV3 available as their second source, which corresponds
>to sys2_pll_333m rather than sys2_pll_125m.
>
>Fixes: b80522040cd3 ("clk: imx: Add clock driver for i.MX8MQ CCM")
>Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak at puri.sm>

Thanks for the fix.

Reviewed-by: Peng Fan <peng.fan at nxp.com>



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