[RFC PATCH 5/5] kselftests/resctrl: Add support for CAT test on ARM
Ben Horgan
ben.horgan at arm.com
Tue Jan 27 12:47:31 PST 2026
Hi Shaopeng,
On 1/23/26 04:40, Shaopeng Tan wrote:
> Currently, CAT test is limited to Intel architectures.
> Add cache cleaning and enable result checking for Arm architectures.
>
> Signed-off-by: Shaopeng Tan <tan.shaopeng at fujitsu.com>
> ---
> tools/testing/selftests/resctrl/cat_test.c | 2 +-
> tools/testing/selftests/resctrl/fill_buf.c | 4 ++++
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c
> index e1b30ab4cef5..58b1590695d1 100644
> --- a/tools/testing/selftests/resctrl/cat_test.c
> +++ b/tools/testing/selftests/resctrl/cat_test.c
> @@ -113,7 +113,7 @@ static int check_results(struct resctrl_val_param *param, const char *cache_type
> ret = show_results_info(sum_llc_perf_miss, bits,
> alloc_size / 64,
> MIN_DIFF_PERCENT_PER_BIT * (bits - 1),
> - runs, get_vendor() == ARCH_INTEL,
> + runs, (get_vendor() == ARCH_INTEL || get_vendor() == ARCH_ARM),
> &prev_avg_llc_val);
> if (ret)
> fail = 1;
> diff --git a/tools/testing/selftests/resctrl/fill_buf.c b/tools/testing/selftests/resctrl/fill_buf.c
> index 19a01a52dc1a..dbbf80d22f42 100644
> --- a/tools/testing/selftests/resctrl/fill_buf.c
> +++ b/tools/testing/selftests/resctrl/fill_buf.c
> @@ -35,6 +35,10 @@ static void cl_flush(void *p)
> #if defined(__i386) || defined(__x86_64)
> asm volatile("clflush (%0)\n\t"
> : : "r"(p) : "memory");
> +#elif defined(__aarch64__)
> + __asm__ __volatile__("dc civac, %0\n\t"
> + : : "r" (p) : "memory");
> +
This is only guaranteed to clean and invalidate to the point of
coherence, PoC. On Grace I expect this is L3/slc and so the cache line
there in L3/slc is likely not invalidated or pushed to DRAM.
The dsb() for synchronization is missing for aarch64 in sb().
> #endif
> }
>
Thanks,
Ben
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