[PATCH 2/4] phy: s32g: Add serdes subsystem phy

[Vincent Guittot]

On Mon, 26 Jan 2026 at 14:11, Philipp Zabel <p.zabel at pengutronix.de> wrote:
>
> On Mo, 2026-01-26 at 10:21 +0100, Vincent Guittot wrote:
> > s32g SoC family includes 2 serdes subsystems which are made of one PCIe
> > controller, 2 XPCS and one Phy. The Phy got 2 lanes that can be configure
> > to output PCIe lanes and/or SGMII.
> >
> > Implement PCIe phy support
> >
> > Co-developed-by: Ciprian Marian Costea <ciprianmarian.costea at oss.nxp.com>
> > Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea at oss.nxp.com>
> > Co-developed-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita at nxp.com>
> > Signed-off-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita at nxp.com>
> > Co-developed-by: Ghennadi Procopciuc <ghennadi.procopciuc at nxp.com>
> > Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc at nxp.com>
> > Co-developed-by: Ionut Vicovan <Ionut.Vicovan at nxp.com>
> > Signed-off-by: Ionut Vicovan <Ionut.Vicovan at nxp.com>
> > Co-developed-by: Bogdan Roman <bogdan-gabriel.roman at nxp.com>
> > Signed-off-by: Bogdan Roman <bogdan-gabriel.roman at nxp.com>
> > Signed-off-by: Vincent Guittot <vincent.guittot at linaro.org>
> > ---
> >  drivers/phy/freescale/Kconfig               |   9 +
> >  drivers/phy/freescale/Makefile              |   1 +
> >  drivers/phy/freescale/phy-nxp-s32g-serdes.c | 569 ++++++++++++++++++++
> >  3 files changed, 579 insertions(+)
> >  create mode 100644 drivers/phy/freescale/phy-nxp-s32g-serdes.c
> >
> [...]
> > diff --git a/drivers/phy/freescale/phy-nxp-s32g-serdes.c b/drivers/phy/freescale/phy-nxp-s32g-serdes.c
> > new file mode 100644
> > index 000000000000..8336c868c8dc
> > --- /dev/null
> > +++ b/drivers/phy/freescale/phy-nxp-s32g-serdes.c
> > @@ -0,0 +1,569 @@
> [...]
> > +static int s32g_serdes_get_ctrl_resources(struct platform_device *pdev, struct s32g_serdes *serdes)
> > +{
> [...]
> > +     ctrl->rst = devm_reset_control_get(dev, "serdes");
>
> Please use devm_reset_control_get_exclusive() directly.

Okay

>
> [...]
> > +static int s32g_serdes_get_pcie_resources(struct platform_device *pdev, struct s32g_serdes *serdes)
> > +{
> [...]
> > +     pcie->rst = devm_reset_control_get(dev, "pcie");
>
> Same here.
>
> regards
> Philipp