[PATCH v9 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range()
Nicolin Chen
nicolinc at nvidia.com
Mon Jan 26 19:14:33 PST 2026
On Mon, Jan 26, 2026 at 06:56:34PM +0000, Will Deacon wrote:
> On Mon, Jan 26, 2026 at 12:09:40PM -0400, Jason Gunthorpe wrote:
> > On Mon, Jan 26, 2026 at 04:02:19PM +0000, Will Deacon wrote:
> > > If we do that, can we drop the smp_mb()s from
> > > arm_smmu_install_{old,new}_domain_invs()?
> >
> > I suppose so, but domain attach isn't a performance path so it depends
> > on your preference for strict pairing of barriers. Currently the two
> > smp_mbs() are paired. Can we reliably pair smp_mb() with dma_wmb()?
> > Are you happy with that clarity?
>
> Yeah, I think that's ok.
>
> > My view is attach isn't a performance path, so having extra barriers
> > is fine if it helps understandability.
>
> I think that the more barriers we have, the harder the code is to
> understand so I would prefer just to have the smp_mb() for the
> write->read case in arm_smmu_domain_inv_range() along with a comment
> explaining why it's needed.
>
> I think that also means that my concern about the old comments on the
> other patch largely disappears.
I sent v10. Thanks for the insightful reviews!
Nicolin
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