[PATCH v3 2/4] dt-bindings: net: nxp,s32-dwmac: Declare per-queue interrupts
Conor Dooley
conor at kernel.org
Mon Jan 26 12:00:33 PST 2026
On Mon, Jan 26, 2026 at 01:46:45PM +0100, Jan Petrous wrote:
> On Fri, Jan 23, 2026 at 05:13:03PM +0000, Conor Dooley wrote:
> > On Fri, Jan 23, 2026 at 11:09:55AM +0100, Jan Petrous via B4 Relay wrote:
> > > From: "Jan Petrous (OSS)" <jan.petrous at oss.nxp.com>
> > >
> > > The DWMAC IP on NXP S32G/R SoCs has connected queue-based IRQ lines,
> > > set them to allow using Multi-IRQ mode when supported.
> >
> > The binding only supports s32{g,r} devices, why is the existing minimum
> > retained? What devices are going to not have all 11 interrupts
> > connected?
> >
>
> The original idea was to support backward compatibility, as older DTs
> didn't contain queue-based interrupt lines described.
>
> But now, when you asked, I started to think it is not needed,
> the requirement for backward compatibility is managed inside the driver
> and yaml shall describe the hardware not used configuration.
Just to be clear, cos the last portion of that "yaml shall..." isn't to
me, you mean that the driver will support 1 or 11 interrupts but you
will make the binding only allow 11? That would be fine.
Just note in the commit message that all of these devices have the 11
interrupts.
> Is it my understanding right? Should I provide v4 with minimum = 11?
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