[PATCH v2] clk: vf610: Add support for the Ethernet switch clocks

Andrew Lunn andrew at lunn.ch
Mon Jan 26 07:51:20 PST 2026


On Mon, Jan 26, 2026 at 12:53:49PM +0100, Lukasz Majewski wrote:
> From: Lukasz Majewski <lukma at denx.de>
> 
> The vf610 device has built in the MoreThanIP L2 switch. For proper
> operation it is required to enable ESW and MAC table lookup clocks.
> 
> The MAC table spans from 0x400E_C000 for 0x4000 and it is necessary
> to provide clocks for each AIPS1-"slot", which size is 0x1000
> (hence four separate entries).
> 
> Those can be enabled via clock gating CCM_CCGR10 register (0x4006_B068).
> 
> This patch also adds VF610_CLK_ESW and VF610_CLK_ESW_MAC_TAB{0123}
> macros definitions for L2 switch.
> 
> The VF610_CLK_END has been removed as its number had to be increased
> when MTIP L2 switch clocks were added.
> 
> Signed-off-by: Lukasz Majewski <lukma at nabladev.com>
> ---
> Changes for v2:
> - Squash clock DT bindings to this single patch
> - Replace VF610_CLK_END with VF610_CLK_ESW_MAC_TAB3 + 1

I'm not sure this is the correct thing to do. Normally these _END
values are there so you don't need to change any code when new things
are added to the list. 

Why not just keep VF610_CLK_END at the end, with the value of 196?

    Andrew



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