[PATCH 1/3] mmc: dw_mmc-k3: Remove mshc alias support
kernel test robot
lkp at intel.com
Thu Jan 22 23:59:31 PST 2026
Hi Shawn,
kernel test robot noticed the following build warnings:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master ulf-hansson-mmc-mirror/next v6.19-rc6 next-20260122]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Shawn-Lin/mmc-dw_mmc-k3-Remove-mshc-alias-support/20260123-095950
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/1769132482-177365-2-git-send-email-shawn.lin%40rock-chips.com
patch subject: [PATCH 1/3] mmc: dw_mmc-k3: Remove mshc alias support
config: arc-randconfig-002-20260123 (https://download.01.org/0day-ci/archive/20260123/202601231543.IzsYNOzJ-lkp@intel.com/config)
compiler: arc-linux-gcc (GCC) 8.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260123/202601231543.IzsYNOzJ-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601231543.IzsYNOzJ-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/mmc/host/dw_mmc-k3.c: In function 'dw_mci_hs_set_timing':
drivers/mmc/host/dw_mmc-k3.c:220:16: error: 'struct dw_mci' has no member named 'mmc'
ctrl_id = host->mmc->index;
^~
>> drivers/mmc/host/dw_mmc-k3.c:217:18: warning: variable 'priv' set but not used [-Wunused-but-set-variable]
struct k3_priv *priv;
^~~~
vim +/priv +217 drivers/mmc/host/dw_mmc-k3.c
0293efddaddfcb Zhangfei Gao 2015-05-14 207
d53e39b1131c08 Shawn Lin 2026-01-23 208 static int dw_mci_hs_set_timing(struct dw_mci *host, int timing,
361c7fe9b02eee liwei 2017-08-11 209 int smpl_phase)
361c7fe9b02eee liwei 2017-08-11 210 {
361c7fe9b02eee liwei 2017-08-11 211 u32 drv_phase;
361c7fe9b02eee liwei 2017-08-11 212 u32 smpl_dly;
361c7fe9b02eee liwei 2017-08-11 213 u32 use_smpl_dly = 0;
361c7fe9b02eee liwei 2017-08-11 214 u32 enable_shift = 0;
361c7fe9b02eee liwei 2017-08-11 215 u32 reg_value;
361c7fe9b02eee liwei 2017-08-11 216 int ctrl_id;
361c7fe9b02eee liwei 2017-08-11 @217 struct k3_priv *priv;
361c7fe9b02eee liwei 2017-08-11 218
361c7fe9b02eee liwei 2017-08-11 219 priv = host->priv;
d53e39b1131c08 Shawn Lin 2026-01-23 @220 ctrl_id = host->mmc->index;
d53e39b1131c08 Shawn Lin 2026-01-23 221
d53e39b1131c08 Shawn Lin 2026-01-23 222 if (ctrl_id >= TIMING_MODE)
d53e39b1131c08 Shawn Lin 2026-01-23 223 return -EINVAL;
361c7fe9b02eee liwei 2017-08-11 224
361c7fe9b02eee liwei 2017-08-11 225 drv_phase = hs_timing_cfg[ctrl_id][timing].drv_phase;
361c7fe9b02eee liwei 2017-08-11 226 smpl_dly = hs_timing_cfg[ctrl_id][timing].smpl_dly;
361c7fe9b02eee liwei 2017-08-11 227 if (smpl_phase == -1)
361c7fe9b02eee liwei 2017-08-11 228 smpl_phase = (hs_timing_cfg[ctrl_id][timing].smpl_phase_max +
361c7fe9b02eee liwei 2017-08-11 229 hs_timing_cfg[ctrl_id][timing].smpl_phase_min) / 2;
361c7fe9b02eee liwei 2017-08-11 230
361c7fe9b02eee liwei 2017-08-11 231 switch (timing) {
361c7fe9b02eee liwei 2017-08-11 232 case MMC_TIMING_UHS_SDR104:
361c7fe9b02eee liwei 2017-08-11 233 if (smpl_phase >= USE_DLY_MIN_SMPL &&
361c7fe9b02eee liwei 2017-08-11 234 smpl_phase <= USE_DLY_MAX_SMPL)
361c7fe9b02eee liwei 2017-08-11 235 use_smpl_dly = 1;
df561f6688fef7 Gustavo A. R. Silva 2020-08-23 236 fallthrough;
361c7fe9b02eee liwei 2017-08-11 237 case MMC_TIMING_UHS_SDR50:
361c7fe9b02eee liwei 2017-08-11 238 if (smpl_phase >= ENABLE_SHIFT_MIN_SMPL &&
361c7fe9b02eee liwei 2017-08-11 239 smpl_phase <= ENABLE_SHIFT_MAX_SMPL)
361c7fe9b02eee liwei 2017-08-11 240 enable_shift = 1;
361c7fe9b02eee liwei 2017-08-11 241 break;
361c7fe9b02eee liwei 2017-08-11 242 }
361c7fe9b02eee liwei 2017-08-11 243
361c7fe9b02eee liwei 2017-08-11 244 mci_writel(host, GPIO, 0x0);
361c7fe9b02eee liwei 2017-08-11 245 usleep_range(5, 10);
361c7fe9b02eee liwei 2017-08-11 246
361c7fe9b02eee liwei 2017-08-11 247 reg_value = FIELD_PREP(UHS_REG_EXT_SAMPLE_PHASE_MASK, smpl_phase) |
361c7fe9b02eee liwei 2017-08-11 248 FIELD_PREP(UHS_REG_EXT_SAMPLE_DLY_MASK, smpl_dly) |
361c7fe9b02eee liwei 2017-08-11 249 FIELD_PREP(UHS_REG_EXT_SAMPLE_DRVPHASE_MASK, drv_phase);
361c7fe9b02eee liwei 2017-08-11 250 mci_writel(host, UHS_REG_EXT, reg_value);
361c7fe9b02eee liwei 2017-08-11 251
361c7fe9b02eee liwei 2017-08-11 252 mci_writel(host, ENABLE_SHIFT, enable_shift);
361c7fe9b02eee liwei 2017-08-11 253
361c7fe9b02eee liwei 2017-08-11 254 reg_value = FIELD_PREP(GPIO_CLK_DIV_MASK, GENCLK_DIV) |
361c7fe9b02eee liwei 2017-08-11 255 FIELD_PREP(GPIO_USE_SAMPLE_DLY_MASK, use_smpl_dly);
361c7fe9b02eee liwei 2017-08-11 256 mci_writel(host, GPIO, (unsigned int)reg_value | GPIO_CLK_ENABLE);
361c7fe9b02eee liwei 2017-08-11 257
361c7fe9b02eee liwei 2017-08-11 258 /* We should delay 1ms wait for timing setting finished. */
361c7fe9b02eee liwei 2017-08-11 259 usleep_range(1000, 2000);
d53e39b1131c08 Shawn Lin 2026-01-23 260
d53e39b1131c08 Shawn Lin 2026-01-23 261 return 0;
361c7fe9b02eee liwei 2017-08-11 262 }
361c7fe9b02eee liwei 2017-08-11 263
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