[PATCH v3 1/2] dt-bindings: interrupt-controller: ti,sci-intr: Per-line interrupt-types
Aniket Limaye
a-limaye at ti.com
Thu Jan 22 09:19:13 PST 2026
Update the bindings to allow setting per-line interrupt-types.
Some Interrupt Router instances can only work with a specific trigger
type (edge or level), while others act as simple passthroughs that
preserve the source interrupt type unchanged.
Make "ti,intr-trigger-type" property optional, with its absence
indicating that the router acts as a passthrough. When absent,
"#interrupt-cells" must be 2 to allow each interrupt source to specify
its trigger type per-line.
Signed-off-by: Aniket Limaye <a-limaye at ti.com>
---
Changes in v3:
- Avoid new redundant value IRQ_TYPE_DEFAULT for "ti,intr-trigger-type"
when "#interrupt-cells"==2. Instead, make this property optional and
check for its absence to use the per-line interrupt-type setting.
- Link to v2:
https://lore.kernel.org/r/20260120-ul-driver-i2c-j722s-v2-1-832097c6b64f@ti.com
Changes in v2:
- Reword Commit msg to better describe the patch
- Link to v1:
https://lore.kernel.org/r/20260116-ul-driver-i2c-j722s-v1-1-c28e8ba38a9e@ti.com
---
.../bindings/interrupt-controller/ti,sci-intr.yaml | 44 +++++++++++++++++++---
1 file changed, 38 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
index c99cc7323c71..8156ce6d2ab4 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
@@ -15,8 +15,7 @@ allOf:
description: |
The Interrupt Router (INTR) module provides a mechanism to mux M
interrupt inputs to N interrupt outputs, where all M inputs are selectable
- to be driven per N output. An Interrupt Router can either handle edge
- triggered or level triggered interrupts and that is fixed in hardware.
+ to be driven per N output.
Interrupt Router
+----------------------+
@@ -54,19 +53,28 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 4]
description: |
- Should be one of the following.
+ Optional property - should be one of the following:
1 = If intr supports edge triggered interrupts.
4 = If intr supports level triggered interrupts.
+ If this property is present, #interrupt-cells must be 1.
+ If this property is absent, #interrupt-cells must be 2 and interrupt
+ source must specify the trigger type in the second cell.
+
reg:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
- const: 1
+ enum: [1, 2]
description: |
- The 1st cell should contain interrupt router input hw number.
+ Number of cells in interrupt specifier. Depends on ti,intr-trigger-type:
+ - If ti,intr-trigger-type is present: must be 1
+ The 1st cell should contain interrupt router input hw number.
+ - If ti,intr-trigger-type is absent: must be 2
+ The 1st cell should contain interrupt router input hw number.
+ The 2nd cell should contain interrupt trigger type (preserved by router).
ti,interrupt-ranges:
$ref: /schemas/types.yaml#/definitions/uint32-matrix
@@ -82,9 +90,22 @@ properties:
- description: |
"limit" specifies the limit for translation
+if:
+ required:
+ - ti,intr-trigger-type
+then:
+ properties:
+ '#interrupt-cells':
+ const: 1
+ description: Interrupt ID only. Interrupt type is specified globally
+else:
+ properties:
+ '#interrupt-cells':
+ const: 2
+ description: Interrupt ID and corresponding interrupt type
+
required:
- compatible
- - ti,intr-trigger-type
- interrupt-controller
- '#interrupt-cells'
- ti,sci
@@ -105,3 +126,14 @@ examples:
ti,sci-dev-id = <131>;
ti,interrupt-ranges = <0 360 32>;
};
+
+ - |
+ main_gpio_intr1: interrupt-controller1 {
+ compatible = "ti,sci-intr";
+ interrupt-controller;
+ interrupt-parent = <&gic500>;
+ #interrupt-cells = <2>;
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <131>;
+ ti,interrupt-ranges = <0 360 32>;
+ };
--
2.52.0
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