[PATCH 03/10] arm: dts: imx6qdl: Add Root Port node and move PERST property to Root Port node

[Sherry Sun]

> Subject: Re: [PATCH 03/10] arm: dts: imx6qdl: Add Root Port node and move
> PERST property to Root Port node
> 
> On Mon, Jan 19, 2026 at 06:02:28PM +0800, Sherry Sun wrote:
> > Since describing the PCIe PERST# property under Host Bridge node is
> > now deprecated, it is recommended to add it to the Root Port node, so
> > creating the Root Port node and move the reset-gpios property.
> >
> > Signed-off-by: Sherry Sun <sherry.sun at nxp.com>
> > ---
> >  arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi |  5 ++++-
> >  arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi         | 11 +++++++++++
> >  arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts |  5 ++++-
> >  3 files changed, 19 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
> > b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
> > index ba29720e3f72..c64c8cbd0038 100644
> > --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
> > +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi
> > @@ -754,11 +754,14 @@ lvds0_out: endpoint {  &pcie {
> >  	pinctrl-names = "default";
> >  	pinctrl-0 = <&pinctrl_pcie>;
> > -	reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
> 
> Generally, don't remove old property to keep back comaptiblity. You can add
> comments here if you want.

Hi Frank,
Actually not remove, just move the property from host bridge node to
the Root Port node, if keep both reset-gpios property in dts, not sure if it may
confuse users because it's unclear which one is the valid configuration.

Best Regards
Sherry
> 
> Frank
> 
> >  	vpcie-supply = <&reg_pcie>;
> >  	status = "okay";
> >  };
> >
> > +&pcie_port0 {
> > +	reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; };
> > +
> >  &pwm1 {
> >  	pinctrl-names = "default";
> >  	pinctrl-0 = <&pinctrl_pwm1>;
> > diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
> > b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
> > index 9793feee6394..c03deb2cdfab 100644
> > --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
> > +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
> > @@ -287,6 +287,17 @@ pcie: pcie at 1ffc000 {
> >  				 <&clks IMX6QDL_CLK_PCIE_REF_125M>;
> >  			clock-names = "pcie", "pcie_bus", "pcie_phy";
> >  			status = "disabled";
> > +
> > +			pcie_port0: pcie at 0 {
> > +				compatible = "pciclass,0604";
> > +				device_type = "pci";
> > +				reg = <0x0 0x0 0x0 0x0 0x0>;
> > +				bus-range = <0x01 0xff>;
> > +
> > +				#address-cells = <3>;
> > +				#size-cells = <2>;
> > +				ranges;
> > +			};
> >  		};
> >
> >  		aips1: bus at 2000000 { /* AIPS1 */
> > diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
> > b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
> > index c5b220aeaefd..c35c24623d36 100644
> > --- a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
> > +++ b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts
> > @@ -45,10 +45,13 @@ MX6QDL_PAD_GPIO_6__ENET_IRQ
> 	0x000b1
> >  };
> >
> >  &pcie {
> > -	reset-gpio = <&max7310_c 5 GPIO_ACTIVE_LOW>;
> >  	status = "okay";
> >  };
> >
> > +&pcie_port0 {
> > +	reset-gpios = <&max7310_c 5 GPIO_ACTIVE_LOW>; };
> > +
> >  &sata {
> >  	status = "okay";
> >  };
> > --
> > 2.37.1
> >