[PATCH v2 10/14] drm/arm: komeda: Convert to drm_output_color_format
Maxime Ripard
mripard at kernel.org
Fri Feb 27 05:59:54 PST 2026
Now that we introduced a new drm_output_color_format enum to represent
what DRM_COLOR_FORMAT_* bits were representing, we can switch to the new
enum.
The main difference is that while DRM_COLOR_FORMAT_ was a bitmask,
drm_output_color_format is a proper enum. However, the enum was done is
such a way than DRM_COLOR_FORMAT_X = BIT(DRM_OUTPUT_COLOR_FORMAT_X) so
the transitition is easier.
The only thing we need to consider is if the original code meant to use
that value as a bitmask, in which case we do need to keep the bit shift,
or as a discriminant in which case we don't.
Reviewed-by: Liviu Dudau <liviu.dudau at arm.com>
Acked-by: Jani Nikula <jani.nikula at intel.com>
Signed-off-by: Maxime Ripard <mripard at kernel.org>
---
drivers/gpu/drm/arm/display/komeda/d71/d71_component.c | 14 +++++++-------
drivers/gpu/drm/arm/display/komeda/komeda_crtc.c | 2 +-
drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h | 5 +++--
drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c | 2 +-
4 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
index 67e5d3b4190f62549bc8da700deb4b15e138b515..27ca2930cdac6e76a058102ea2c1d8306d85e751 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
@@ -1078,15 +1078,15 @@ static void d71_improc_update(struct komeda_component *c,
}
mask |= IPS_CTRL_YUV | IPS_CTRL_CHD422 | IPS_CTRL_CHD420;
/* config color format */
- if (st->color_format == DRM_COLOR_FORMAT_YCBCR420)
+ if (st->color_format == DRM_OUTPUT_COLOR_FORMAT_YCBCR420)
ctrl |= IPS_CTRL_YUV | IPS_CTRL_CHD422 | IPS_CTRL_CHD420;
- else if (st->color_format == DRM_COLOR_FORMAT_YCBCR422)
+ else if (st->color_format == DRM_OUTPUT_COLOR_FORMAT_YCBCR422)
ctrl |= IPS_CTRL_YUV | IPS_CTRL_CHD422;
- else if (st->color_format == DRM_COLOR_FORMAT_YCBCR444)
+ else if (st->color_format == DRM_OUTPUT_COLOR_FORMAT_YCBCR444)
ctrl |= IPS_CTRL_YUV;
malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl);
}
@@ -1143,16 +1143,16 @@ static int d71_improc_init(struct d71_dev *d71,
return PTR_ERR(c);
}
improc = to_improc(c);
improc->supported_color_depths = BIT(8) | BIT(10);
- improc->supported_color_formats = DRM_COLOR_FORMAT_RGB444 |
- DRM_COLOR_FORMAT_YCBCR444 |
- DRM_COLOR_FORMAT_YCBCR422;
+ improc->supported_color_formats = BIT(DRM_OUTPUT_COLOR_FORMAT_RGB444) |
+ BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444) |
+ BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR422);
value = malidp_read32(reg, BLK_INFO);
if (value & IPS_INFO_CHD420)
- improc->supported_color_formats |= DRM_COLOR_FORMAT_YCBCR420;
+ improc->supported_color_formats |= BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR420);
improc->supports_csc = true;
improc->supports_gamma = true;
return 0;
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
index 9c8b8da531a7f169cb55f0daba3a898d29cdfdf9..714af5c889d742144113f6d86c79b009d6a19384 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
@@ -38,11 +38,11 @@ void komeda_crtc_get_color_config(struct drm_crtc_state *crtc_st,
min_bpc = conn_bpc;
}
/* connector doesn't config any color_format, use RGB444 as default */
if (!conn_color_formats)
- conn_color_formats = DRM_COLOR_FORMAT_RGB444;
+ conn_color_formats = BIT(DRM_OUTPUT_COLOR_FORMAT_RGB444);
*color_depths = GENMASK(min_bpc, 0);
*color_formats = conn_color_formats;
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
index 37b9e92202443cc72adc0666ed047d4f77d79782..bbee6da43164f7cc32340ff4479d99609c18db7e 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
@@ -317,20 +317,21 @@ struct komeda_splitter_state {
u16 overlap;
};
struct komeda_improc {
struct komeda_component base;
- u32 supported_color_formats; /* DRM_RGB/YUV444/YUV420*/
+ u32 supported_color_formats; /* BIT(DRM_OUTPUT_COLOR_FORMAT_RGB444/YUV444/YUV420) */
u32 supported_color_depths; /* BIT(8) | BIT(10)*/
u8 supports_degamma : 1;
u8 supports_csc : 1;
u8 supports_gamma : 1;
};
struct komeda_improc_state {
struct komeda_component_state base;
- u8 color_format, color_depth;
+ enum drm_output_color_format color_format;
+ u8 color_depth;
u16 hsize, vsize;
u32 fgamma_coeffs[KOMEDA_N_GAMMA_COEFFS];
u32 ctm_coeffs[KOMEDA_N_CTM_COEFFS];
};
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
index f4e76b46ca327a1c5db9bdbdd9550b45190b30d8..6f9b10cc831ff748296b9ed30b6de398c90c4786 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
@@ -797,11 +797,11 @@ komeda_improc_validate(struct komeda_improc *improc,
improc->supported_color_formats);
return -EINVAL;
}
st->color_depth = __fls(avail_depths);
- st->color_format = BIT(__ffs(avail_formats));
+ st->color_format = __ffs(avail_formats);
}
if (kcrtc_st->base.color_mgmt_changed) {
drm_lut_to_fgamma_coeffs(kcrtc_st->base.gamma_lut,
st->fgamma_coeffs);
--
2.53.0
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