[PATCH v2 8/8] coresight: cti: Properly handle negative offsets in cti_reg32_{show|store}()
Mike Leach
mike.leach at arm.com
Fri Feb 27 03:34:15 PST 2026
Hi Leo,
On 2/26/26 09:23, Leo Yan wrote:
> Return an error when the offset is negative.
>
> Signed-off-by: Leo Yan <leo.yan at arm.com>
> ---
> drivers/hwtracing/coresight/coresight-cti-sysfs.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> index 9ef44956ebdc7781717d773fa014165989df2048..4c0a60840efb9ecc47850c1eb5a7abb41b49c5cc 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> @@ -252,8 +252,11 @@ static ssize_t cti_reg32_show(struct device *dev, char *buf,
> struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
> struct cti_config *config = &drvdata->config;
>
> + if (reg_offset < 0)
> + return -EINVAL;
> +
> scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) {
> - if ((reg_offset >= 0) && cti_is_active(config)) {
> + if (cti_is_active(config)) {
> val = cti_read_single_reg(drvdata, reg_offset);
> if (pcached_val)
> *pcached_val = val;
> @@ -280,13 +283,16 @@ static ssize_t cti_reg32_store(struct device *dev, const char *buf,
> if (kstrtoul(buf, 0, &val))
> return -EINVAL;
>
> + if (reg_offset < 0)
> + return -EINVAL;
> +
> scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) {
> /* local store */
> if (pcached_val)
> *pcached_val = (u32)val;
>
> /* write through if offset and enabled */
> - if ((reg_offset >= 0) && cti_is_active(config))
> + if (cti_is_active(config))
> cti_write_single_reg(drvdata, reg_offset, val);
> }
>
>
Given that at this point the code is only called via macro, which
hardcodes the offsets. don't think the check will ever return the error.
But in case usage changes in future this is safe. so..
Reviewed-by: Mike Leach <mike.leach at Arm.com>
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