[PATCH v2 1/2] dt-bindings: fsl: imx7ulp-smc1: Add #clock-cells property

Krzysztof Kozlowski krzk at kernel.org
Fri Feb 27 01:46:48 PST 2026


On Fri, Feb 27, 2026 at 02:30:43PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan at nxp.com>
> 
> The SMC1 block on i.MX7ULP is already used as a clock provider in
> imx7ulp.dtsi, but the corresponding dt-binding schema does not define
> the required '#clock-cells' property. This results in CHECK_DTBS schema
> validation errors.
> 
> Functionally, SMC1 controls the CPU run mode configuration:
>   - 00b: Normal Run (RUN)
>   - 10b: Very-Low-Power Run (VLPR)
>   - 11b: High-Speed Run (HSRUN)
> 
> These run modes determine the effective CPU operating point, and their
> programming is tied to the OPP table.
> 
> Add the missing `#clock-cells` definition so the dt-binding schema is
> consistent with the DTS and validates correctly.
> 

This looks like a fix, especially that you make the cells required, so
missing Fixes tag.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>

Best regards,
Krzysztof




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