[PATCH v2 10/11] dt-bindings: firmware: add arm,ras-ffh

[Himanshu Chauhan]

On Fri, Feb 20, 2026 at 7:15 PM Ahmed Tiba <ahmed.tiba at arm.com> wrote:
>
> Describe the DeviceTree node that exposes the Arm firmware-first handler
> CPER provider and hook the file into MAINTAINERS so the binding has an
> owner.
>
> Signed-off-by: Ahmed Tiba <ahmed.tiba at arm.com>
> ---
>  .../devicetree/bindings/firmware/arm,ras-ffh.yaml  | 71 ++++++++++++++++++++++
>  MAINTAINERS                                        |  5 ++
>  2 files changed, 76 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/firmware/arm,ras-ffh.yaml b/Documentation/devicetree/bindings/firmware/arm,ras-ffh.yaml
> new file mode 100644
> index 000000000000..eccbaaf45885
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/arm,ras-ffh.yaml
> @@ -0,0 +1,71 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/arm,ras-ffh.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Firmware-First Handler (FFH) CPER provider

Please don't called it FFH. FFH stands for Fixed Feature Hardware and
ACPI uses it at multiple places. It is causing confusion.
> +
> +maintainers:
> +  - Ahmed Tiba <ahmed.tiba at arm.com>
> +
> +description: |
> +  Arm Reliability, Availability and Serviceability (RAS) firmware can expose
> +  a firmware-first handler (FFH) that provides UEFI CPER Generic Error Status
> +  blocks directly via DeviceTree. The firmware owns the CPER buffer
> +  and notifies the OS through an interrupt.
> +
> +properties:
> +  compatible:
> +    const: arm,ras-ffh
> +
> +  reg:
> +    minItems: 1
> +    items:
> +      - description:
> +          CPER Generic Error Status block exposed by firmware
> +      - description:
> +          Optional 32- or 64-bit doorbell register used on platforms
> +          where firmware needs an explicit "ack" handshake before overwriting
> +          the CPER buffer. Firmware watches bit 0 and expects the OS to set it
> +          once the current status block has been consumed.
> +
> +  interrupts:
> +    maxItems: 1
> +    description:
> +      Interrupt used to signal that a new status record is ready.
> +
> +  memory-region:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      Optional phandle to the reserved-memory entry that backs the status
> +      buffer so firmware and the OS use the same carved-out region.
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    reserved-memory {
> +      #address-cells = <2>;
> +      #size-cells = <2>;
> +      ras_cper_buffer: cper at fe800000 {
> +        reg = <0x0 0xfe800000 0x0 0x1000>;
> +        no-map;
> +      };
> +    };
> +
> +    error-handler at fe800000 {
> +      compatible = "arm,ras-ffh";
> +      reg = <0xfe800000 0x1000>,
> +            <0xfe810000 0x4>;
> +      memory-region = <&ras_cper_buffer>;
> +      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> +    };
> +...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index b8d8a5c41597..47db7877b485 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -22027,6 +22027,11 @@ M:     Alexandre Bounine <alex.bou9 at gmail.com>
>  S:     Maintained
>  F:     drivers/rapidio/
>
> +RAS ERROR STATUS
> +M:     Ahmed Tiba <ahmed.tiba at arm.com>
> +S:     Maintained
> +F:     Documentation/devicetree/bindings/firmware/arm,ras-ffh.yaml
> +
>  RAS INFRASTRUCTURE
>  M:     Tony Luck <tony.luck at intel.com>
>  M:     Borislav Petkov <bp at alien8.de>
>
> --
> 2.43.0
>
>