[PATCH] arm64: dts: mediatek: mt8195-cherry: Disable xhci1 completely

Chen-Yu Tsai wenst at chromium.org
Mon Feb 23 23:03:05 PST 2026


There is nothing connected to xhci1 in this design, nor in the actual
end devices.

Disable xhci1. Keep the USB PHY enabled, as it is a shared PHY and used
for pcie1.

Signed-off-by: Chen-Yu Tsai <wenst at chromium.org>
---
 arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index b3761b80cac7..6e99122c65ac 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -1495,6 +1495,7 @@ &u3phy0 {
 };
 
 &u3phy1 {
+	/* shared between xhci1 and pcie1. */
 	status = "okay";
 };
 
@@ -1563,16 +1564,6 @@ &xhci0 {
 	vbus-supply = <&usb_vbus>;
 };
 
-&xhci1 {
-	status = "okay";
-
-	phys = <&u2port1 PHY_TYPE_USB2>;
-	rx-fifo-depth = <3072>;
-	vusb33-supply = <&mt6359_vusb_ldo_reg>;
-	vbus-supply = <&usb_vbus>;
-	mediatek,u3p-dis-msk = <1>;
-};
-
 &xhci2 {
 	status = "okay";
 	vbus-supply = <&usb_vbus>;
-- 
2.53.0.371.g1d285c8824-goog




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