[PATCH 3/6] irqchip/gic-v3-its: Add fsl_mc device plumbing to the msi-parent handling

[Thomas Gleixner]

On Mon, Feb 23 2026 at 09:01, Marc Zyngier wrote:
> On Sun, 22 Feb 2026 22:57:44 +0000,
> Thomas Gleixner <tglx at kernel.org> wrote:
>> This rejects as you are building against an unmerged change (I assume
>> it's Lorenzos GIC5 stuff). I can fix it up when applying.
>
> That was against vanilla 6.19. I'll rebase on -rc1 to satisfy myself
> that this is still doing the right thing after the ACPI crap fest, and
> repost the result.

Ah. The other way round :)

My resolution is simple and it looks about right. Please note the
cosmetic changes I did on the way :)

Thanks,

        tglx
---
--- a/drivers/irqchip/irq-gic-its-msi-parent.c
+++ b/drivers/irqchip/irq-gic-its-msi-parent.c
@@ -5,6 +5,7 @@
 // Copyright (C) 2022 Intel
 
 #include <linux/acpi_iort.h>
+#include <linux/fsl/mc.h>
 #include <linux/of_address.h>
 #include <linux/pci.h>
 
@@ -186,10 +187,12 @@ static int its_pmsi_prepare(struct irq_d
 			    int nvec, msi_alloc_info_t *info)
 {
 	struct msi_domain_info *msi_info;
+	int ret = 0;
 	u32 dev_id;
-	int ret;
 
-	if (dev->of_node)
+	if (dev_is_fsl_mc(dev))
+		dev_id = fsl_mc_get_msi_id(dev);
+	else if (dev->of_node)
 		ret = of_pmsi_get_msi_info(domain->parent, dev, &dev_id, NULL);
 	else
 		ret = iort_pmsi_get_msi_info(dev, &dev_id, NULL);