[PATCH 2/8] coresight: cti: Fix register reads

[Mike Leach]

> -----Original Message-----
> From: Leo Yan <leo.yan at arm.com>
> Sent: Monday, February 9, 2026 6:01 PM
> To: Suzuki Poulose <Suzuki.Poulose at arm.com>; Mike Leach
> <Mike.Leach at arm.com>; James Clark <james.clark at linaro.org>; Alexander
> Shishkin <alexander.shishkin at linux.intel.com>; Greg Kroah-Hartman
> <gregkh at linuxfoundation.org>; Mathieu Poirier
> <mathieu.poirier at linaro.org>; Tingwei Zhang <quic_tingwei at quicinc.com>;
> Yingchao Deng <yingchao.deng at oss.qualcomm.com>; Jie Gan
> <jie.gan at oss.qualcomm.com>
> Cc: coresight at lists.linaro.org; linux-arm-kernel at lists.infradead.org; linux-
> kernel at vger.kernel.org; Leo Yan <Leo.Yan at arm.com>
> Subject: [PATCH 2/8] coresight: cti: Fix register reads
> 
> Introduce cti_read_single_reg() as an interface for reading registers
> with unlocking the CS lock.  Consolidate register read in sysfs
> interfaces using this new helper.
> 
> Fixes: b5213376c240 ("coresight: cti: Add sysfs access to program function
> registers")
> Fixes: 1a556ca6cc24 ("coresight: cti: Add sysfs coresight mgmt register
> access")
> Signed-off-by: Leo Yan <leo.yan at arm.com>
> ---
>  drivers/hwtracing/coresight/coresight-cti-core.c  | 11 +++++++++++
>  drivers/hwtracing/coresight/coresight-cti-sysfs.c |  6 ++----
>  drivers/hwtracing/coresight/coresight-cti.h       |  1 +
>  3 files changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c
> b/drivers/hwtracing/coresight/coresight-cti-core.c
> index
> b75c4ec2c8d5d58da8761334643dba34001b48c7..2d8b1cbe5bf5c9ce0383
> dc90335f0085b22a7f61 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-core.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-core.c
> @@ -165,6 +165,17 @@ static int cti_disable_hw(struct cti_drvdata
> *drvdata)
>  	return 0;
>  }
> 
> +u32 cti_read_single_reg(struct cti_drvdata *drvdata, int offset)
> +{
> +	int val;
> +
> +	CS_UNLOCK(drvdata->base);
> +	val = readl_relaxed(drvdata->base + offset);
> +	CS_LOCK(drvdata->base);
> +
> +	return val;
> +}
> +
>  void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value)
>  {
>  	CS_UNLOCK(drvdata->base);
> diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> index
> 455d08bcccd49a3f1eac8abd8246806ef73a9ab6..9a997b2f090472761e973
> 4fffc534663df8b06c6 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c
> @@ -183,7 +183,7 @@ static ssize_t coresight_cti_reg_show(struct device
> *dev,
> 
>  	scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) {
>  		if (drvdata->config.hw_powered)
> -			val = readl_relaxed(drvdata->base + cti_attr->off);
> +			val = cti_read_single_reg(drvdata, cti_attr->off);
>  	}
> 
>  	pm_runtime_put_sync(dev->parent);
> @@ -269,11 +269,9 @@ static ssize_t cti_reg32_show(struct device *dev,
> char *buf,
> 
>  	scoped_guard(raw_spinlock_irqsave, &drvdata->spinlock) {
>  		if ((reg_offset >= 0) && cti_active(config)) {
> -			CS_UNLOCK(drvdata->base);
> -			val = readl_relaxed(drvdata->base + reg_offset);
> +			val = cti_read_single_reg(drvdata, reg_offset);
>  			if (pcached_val)
>  				*pcached_val = val;
> -			CS_LOCK(drvdata->base);
>  		} else if (pcached_val) {
>  			val = *pcached_val;
>  		}
> diff --git a/drivers/hwtracing/coresight/coresight-cti.h
> b/drivers/hwtracing/coresight/coresight-cti.h
> index
> 4f89091ee93f5fb046d93b97a4085051fca6b39d..64f7324f098e8b5f90c65
> 54e3872e3bf01988717 100644
> --- a/drivers/hwtracing/coresight/coresight-cti.h
> +++ b/drivers/hwtracing/coresight/coresight-cti.h
> @@ -222,6 +222,7 @@ int cti_disable(struct coresight_device *csdev, struct
> coresight_path *path);
>  void cti_write_all_hw_regs(struct cti_drvdata *drvdata);
>  void cti_write_intack(struct device *dev, u32 ackval);
>  void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value);
> +u32 cti_read_single_reg(struct cti_drvdata *drvdata, int offset);
>  int cti_channel_trig_op(struct device *dev, enum cti_chan_op op,
>  			enum cti_trig_dir direction, u32 channel_idx,
>  			u32 trigger_idx);
> 
> --
> 2.34.1

Reviewed-by: Mike Leach <mike.leach at arm.com>