[PATCH v2 6/7] ARM: dts: bcm63138: Add I2C block

[William Zhang]

On Wed, Feb 18, 2026 at 1:31 AM Linus Walleij <linusw at kernel.org> wrote:
>
> The BCM63138 has a brcmper I2C block.
I remember there was some discussion on whether this driver really
works on DSL chips.
Did you have any way to test it?

>
> The interrupt is at INTERRUPT_ID_I2C whic is
> (ISR_TABLE3_OFFSET + 19) = 96+115, convert back
> to SPI interrupt 115-32 = 83.
>
> Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm63138.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm63138.dtsi b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> index 8e41c7130406..4ca4ec2ffed6 100644
> --- a/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm63138.dtsi
> @@ -312,6 +312,15 @@ bootlut: bootlut at 8000 {
>                         reg = <0x8000 0x50>;
>                 };
>
> +               i2c0: i2c at be00 {
> +                       compatible = "brcm,brcmper-i2c";
> +                       reg = <0xbe00 0x60>;
reg offset 0x3e00 as  the translation window starts from 0xfffe8000.
Patch for 63148 has the same issue.

> +                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       status = "disabled";
> +               };
> +
>                 pl081_dma: dma-controller at d000 {
>                         compatible = "arm,pl081", "arm,primecell";
>                         // The magic B105F00D info is missing
>
> --
> 2.53.0
>
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