[PATCH] mmc: sdhci-brcmstb: use correct register offset for V1 pin_sel restore

[Ulf Hansson]

On Tue, 17 Feb 2026 at 19:47, Florian Fainelli
<florian.fainelli at broadcom.com> wrote:
>
> On 2/16/26 11:15, Kamal Dasu wrote:
> > The restore path for SDIO_CFG_CORE_V1 was incorrectly using
> > SDIO_CFG_SD_PIN_SEL (offset 0x44) instead of SDIO_CFG_V1_SD_PIN_SEL
> > (offset 0x54), causing the wrong register to be written on resume.
> > The save path already uses the correct V1-specific offset. This
> > affects BCM7445 and BCM72116 platforms which use the V1 config core.
> >
> > Fixes: b7e614802e3f ("mmc: sdhci-brcmstb: save and restore registers during PM")
> > Signed-off-by: Kamal Dasu <kamal.dasu at broadcom.com>
>
> Late to the party but:

No worries!

>
> Tested-by: Florian Fainelli <florian.fainelli at broadcom.com>
> Reviewed-by: Florian Fainelli <florian.fainelli at broadcom.com>

The tags added to the commit and thanks for testing/reviewing!

Kind regards
Uffe