[PATCH v9 01/12] asm-generic: barrier: Add smp_cond_load_relaxed_timeout()

[Ankur Arora]

David Laight <david.laight.linux at gmail.com> writes:

> On Fri, 13 Feb 2026 20:58:08 -0800
> Ankur Arora <ankur.a.arora at oracle.com> wrote:
>
>> David Laight <david.laight.linux at gmail.com> writes:
> ...
>> > Plus the cost of evaluating cond_expr 200 times.
>> > I guess that isn't expected to contain a PCIe read :-)
>>
>> :). Good point. I'll see if I can add something like "when polling on
>> a memory address".
>
> I've only timed PCIe reads into an fpga (Cyclone V) target, but those
> are about 1 micro-second - which is a lot of clocks.
> Hard logic will be somewhat faster - but still slow.

Yeah that would be a lot of clocks.

> There might be other places where 200 isn't a good value.
> Perhaps add an extra #define that drops in the loop count?

In principle that makes sense. However, if we add a variant like this
where the user specifies their own value of loop count:

#define __smp_cond_load_relaxed_timeout(ptr, cond_expr,
                                        time_expr_ns, timeout_ns, loop_count)

that means that the user needs to define a sane loop count value for all
platforms where it might get called. That just seems to shift the problem
to the callers.

--
ankur